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71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 1 of 83 71m6531 demo board user?s manual 6/2/2008 5:23:00 pm v1.5 teridian semiconductor corporation 6440 oak canyon rd., suite 100 irvine, ca 92618-5201 phone: (714) 508-8800 ? fax: (714) 508-8878 http://www.teridian.com/ meter.support@teridian.com
71m6531 demo board user?s manual page: 2 of 83 ? 2007-2008 teridian semiconductor corporation v1.5
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 3 of 83 teridian semiconductor corporation makes no warranty for the use of its products, other than expressly contained in the company?s warranty detailed in the teridian semiconductor corporation standard terms and conditions. the company assumes no responsibility for any errors which may appe ar in this document, reserves the right to change devices or specifications deta iled herein at any time without notice and does not make any commitment to update the information contained herein.
71m6531 demo board user?s manual page: 4 of 83 ? 2007-2008 teridian semiconductor corporation v1.5 71m6531 single-phase energy meter ic demo board user?s manual
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 5 of 83 table of contents 1 getting st arted................................................................................................................ ........................... 9 1.1 genera l ............................................................................................................................................................... 9 1.2 safety and esd notes .......................................................................................................... ............................. 9 1.3 demo kit c ontents ............................................................................................................. ............................... 9 1.4 compatibility ............................................................................................................................... ..................... 10 1.5 suggested equipmen t not included .............................................................................................. ................ 10 1.6 demo board t est se tup ......................................................................................................... ......................... 10 1.6.1 power suppl y setup ............................................................................................................ ....................... 12 1.6.2 cable for serial connection ................................................................................................... .................. 13 1.6.3 checking operation ............................................................................................................................... ..... 13 1.6.4 serial connection setup for the pc............................................................................................. ............... 14 1.7 using the de mo bo ard .......................................................................................................... .......................... 15 1.7.1 cycling the lcd display ............................................................................................................................. 1 5 1.7.2 serial command line interface (cli) ........................................................................................... .............. 16 1.7.3 communicating via in tel hex records ........................................................................................... ............ 22 1.7.4 using the batte ry modes ....................................................................................................... ..................... 24 1.8 using the demo board fo r metering fun ctions ................................................................................... ......... 25 1.8.1 modifying demo code to ct or s hunt m ode ....................................................................................... .... 25 1.8.2 using the demo board in shunt and ct modes .................................................................................... . 25 1.8.3 adjusting the kh factor for the de mo board .................................................................................... .......... 26 1.8.4 adjusting the demo boards to different ct wi nding rati os ...................................................................... 27 1.8.5 adjusting the demo boards to voltage transformers or di fferent voltag e divider s ................................... 27 1.8.6 wiring of the demo board and a shunt resistor ................................................................................. ....... 27 1.9 calibration pa rameters ........................................................................................................ ........................... 30 1.9.1 general calibrat ion proc edure ................................................................................................. .................. 30 1.9.2 updating the 6531_d emo.hex file ............................................................................................... ................ 30 1.9.3 calibration ma cro f ile ........................................................................................................ ........................ 31 1.9.4 updating calibration data in eeprom or flash .................................................................................. ...... 31 1.9.5 loading the 6531_dem o.hex file into the demo board............................................................................. .. 31 1.9.6 the programming interfac e of the 71m6531 ...................................................................................... ........ 33 1.10 demo c ode ..................................................................................................................... ................................. 34 1.10.1 demo code de scription ......................................................................................................... .................... 34 1.10.2 accessing lcd and sleep modes from brownout mode ............................................................................ 3 4 1.10.3 demo code memory locatio ns .................................................................................................... .............. 34 1.11 emulator op eration ............................................................................................................ ............................. 41 2 application in format ion ....................................................................................................... ................. 43 2.1 calibration theory ............................................................................................................ ............................... 43 2.1.1 calibration with th ree measur ements ........................................................................................... ............. 43 2.1.2 calibration with fi ve measur ements ............................................................................................ .............. 45 2.1.3 fast calib ration .............................................................................................................. ............................ 46 2.2 calibration pr ocedur es ........................................................................................................ ........................... 47 2.2.1 general precautions ............................................................................................................................... .... 47 2.2.2 calibration procedure with three meas urement s ................................................................................. ..... 48 2.2.3 calibration procedure with five meas urements .................................................................................. ....... 48 2.2.4 procedure for auto -calibra tion ................................................................................................ ................... 49 2.2.5 calibration sp readshe ets ...................................................................................................... ..................... 49
71m6531 demo board user?s manual page: 6 of 83 ? 2007-2008 teridian semiconductor corporation v1.5 2.2.6 compensating for n on-linear ities .............................................................................................. ................ 51 2.2.7 calibrating meters with comb ined ct and shunt resist or ........................................................................ 51 2.3 calibrating and comp ensating th e rtc .......................................................................................... .............. 54 2.4 testing the de mo bo ard ........................................................................................................ ......................... 55 2.4.1 functional meter test ............................................................................................................................... .. 55 2.4.2 eeprom ............................................................................................................................... ..................... 56 2.4.3 rtc ........................................................................................................................... ................................. 57 2.4.4 hardware watc hdog ti mer ....................................................................................................... ................. 57 2.4.5 lcd ........................................................................................................................... ................................. 57 2.4.6 supply current measurem ents ................................................................................................... ................ 58 2.5 teridian appli cation no tes .................................................................................................... ...................... 58 3 hardware description ............................................................................................................................ 59 3.1 demo board description: jumpers, swit ches, test points and connectors ............................................ 59 3.2 demo board hardware specifications ........................................................................................................... 63 4 appendix ...................................................................................................................... .................................. 65 4.1 71m6531n12a2 demo board electrical schematic .................................................................................. .... 66 4.2 71m6531n12a2 de mo board bill of material ................................................................................................. 69 4.3 71m6531n12a2 demo bo ard pcb layout ............................................................................................ ......... 70 4.4 debug board bill of material .................................................................................................. ........................ 75 4.5 debug board sc hematics ........................................................................................................ ....................... 76 4.6 debug board pcb layout ............................................................................................................................... 77 4.7 teridian 71m6531 pi n-out information .......................................................................................... ............. 80 4.8 revision hi stor y .............................................................................................................. ................................ 83 list of figures figure 1-1: demo board: basic con nections ..................................................................................... .......................... 10 figure 1-2: demo board: ribbon cabl e connec tions .............................................................................. .................... 11 figure 1-3: the teridian 6531 demo board with debug board block diagram (ct configur ation) ......................... 12 figure 1-4: port configuration setup ............................................................................................................................ 14 figure 1-5: hyperterminal sample window with di sconnect button ................................................................ ............ 15 figure 1-6: pre-wir ed shunt re sistor .......................................................................................... ................................... 28 figure 1-7: connection of the pre-wired shunt resist or ........................................................................ ..................... 29 figure 1-8: typical cali bration macr o file .................................................................................... ................................. 31 figure 1-9: emulator window sh owing reset and er ase butt ons ................................................................... ............ 32 figure 1-10: emulator window showing erased flash memory and file load menu .................................................. 32 figure 2-1: watt meter with gain and phase errors. ................................................................................................... 43 figure 2-2: phase an gle defini tions ........................................................................................... .................................. 47 figure 2-3: calibration spread sheet for three measurements .................................................................... ................ 49 figure 2-4: calibration spread sheet for five measurem ents ..................................................................... .................. 50 figure 2-5: calibration spread sheet for fast calibrat ion ...................................................................... ....................... 50 figure 2-6: non-linearity caus ed by quantifi cation no ise ...................................................................... .................... 51 figure 2-7: 71m6531 with shunt and ct ......................................................................................... ............................ 52 figure 2-17: meter with calibration system .................................................................................... ............................. 56 figure 2-18: calibration system screen ........................................................................................ .............................. 56 figure 3-1: 71m6531n12 a2 board connectors, jumpers, switches, and te st points ................................................ 62 figure 4-1: 71m6531n12a2 demo bo ard (rev 2.0): electrical schematic 1/3 ? shunt c onfigurat ion ....................... 66 figure 4-2: 71m653 1n12a2 demo board (rev 2.0): electrical schematic 2/3 ? ct configur ation ............................ 67 figure 4-3: 71m6531n12a2 demo board (rev 2.0): electrical schematic 3/3 ? dig ital sect ion ................................ 68 figure 4-4: 71m 6531n12a2 demo board: top silk screen .......................................................................... ............... 70
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 7 of 83 figure 4-5: 71m 6531n12a2 demo board: top copper layer ......................................................................... ............ 71 figure 4-6: 71m6531n12a2 demo board: bottom vi ew with silk screen ............................................................. ...... 72 figure 4-7: 71m 6531n12a2 demo board: bottom copper layer ? bottom view ........................................................ 73 figure 4-8: 71m6531n12 a2 demo board: bottom copper la yer ? layer view from top ........................................... 74 figure 4-9: debug board: electrical schemat ic ................................................................................. .......................... 76 figure 4-10: debug board: top view ............................................................................................ ............................... 77 figure 4-11: debug board: bottom view ...................................................................................................................... 77 figure 4-12: debu g board: top si gnal layer .................................................................................... ........................... 78 figure 4-13: debug board: mi ddle layer 1, ground pl ane ........................................................................ .................. 78 figure 4-14: debu g board: middle layer 2, supply plane ........................................................................ ................... 79 figure 4-15: debu g board: bottom trace layer .................................................................................. ........................ 79 figure 4-16: teridian 71m6531 lqfp64: pi nout (top view) ....................................................................... .............. 82 list of tables table 1-1: jumper se ttings on debu g board ..................................................................................... ........................... 13 table 1-2: straight cable conn ections ......................................................................................... ................................. 13 table 1-3: null-modem cable conn ections ....................................................................................... ............................ 13 table 1-4: com port setup para meters .......................................................................................... ............................ 14 table 1-5: selectabl e display options ......................................................................................... ................................ 16 table 1-6: fields of a hex record ............................................................................................................................... . 22 table 1-7: data (command) types ............................................................................................... ................................. 23 table 1-8: hex re cord examples ................................................................................................ ................................. 23 table 1-9: pre-asse mbled hex records .......................................................................................... .............................. 24 table 1-10: xram locations for calibration consta nts .......................................................................... ..................... 30 table 1-11: flash programmi ng interfac e signals ............................................................................... ........................ 33 table 1-12: mpu me mory locations .............................................................................................. ............................... 38 table 1-13: values for pu lse source registers.................................................................................. .......................... 39 table 1-14: status register ..................................................................................................................... .................... 40 table 1-15: mpu accumula tion output variables ................................................................................. ....................... 41 table 2-1: calibration summary ............................................................................................................................... .... 54 table 3-1: 71m6531 demo board descrip tion: 1/3 ................................................................................ ....................... 59 table 3-2: 71m6531 demo board descrip tion: 2/3 ................................................................................ ....................... 60 table 3-3: 71m6531 demo board descrip tion: 3/3 ................................................................................ ....................... 61 table 4-1: 71m6531n12a2 de mo board: bill of mate rial (shunt version) .......................................................... ......... 69 table 4-2: debug board: bill of ma terial ...................................................................................... ................................ 75 table 4-3: 71m6531 pin description 1/2 ....................................................................................................................... 80 table 4-4: 71m6531 pin description 2/2 ....................................................................................................................... 82
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71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 9 of 83 1 getting started 1.1 general the teridian semiconductor corporation (tsc) 71m6531 demo board is an energy meter ic demonstra- tion board for evaluating the 71m6531d/f device for resi dential electronic energy metering applications. it incorporates a 71m6531d/f integrated circuit, peripheral circuitry such as a serial eeprom, emulator port, and on-board power supply as well as a companion debug board that allows a connection to a pc through a rs232 port. the demo board allows the evaluation of the 71m6531d/f energy meter controller chip for measurement accuracy and overall system use. the board is pre-programmed with a demo program (f ile name 6531_demo.hex) in the flash memory of the 71m6531d/f ic. this embedded application is develo ped to exercise all low-level functions to directly manage the peripherals and cpu (clock, timing, power savings, etc.). 1.2 safety and esd notes connecting live voltages to the demo board system will result in potentially hazardous voltages on the demo board. extreme caution should be taken when handling the demo board once it is connected to live voltages! the demo system is esd sensitive! esd precautions should be taken when handling the demo board! 1 1.3 demo kit contents ? 71m6531 demo board containing 71m6531d/f ic with preloaded demo program and prepared for either ct or shunt resistor operation ? debug board ? shunt resistor with wire harness, 400 ? (for kits shipped in shunt configuration) ? two 5vdc/1,000ma universal wall transformers w/ 2.5mm plug (switchcraft 712a) ? serial cable, db9, male/female, 2m length (digi-key ae1379-nd) ? cd-rom containing documentation (data sheet, bo ard schematics, bom, layout), demo code, and utilities note: the cd-rom contains a file named readme.txt that specifies all files found on the media and their purpose.
71m6531 demo board user?s manual 1.4 compatibility this manual applies to the following hardware and software revisions: ? 71m6531d/f, chip revision a03 ? demo boards d6531n12a2 ? demo board code revision 6531_4p6q_12may08_0cc.hex, 6531_4p6q_12may08_0sc.hex (equ 0) , 6531_4p6q_12may08_1cc.hex equ 1), 6531_4p6q_12may08_2cc.hex (equ 2), or later 1.5 suggested equipmen t not included for functional demonstration: ? pc w/ ms-windows ? versions xp, me, or 2000, equipped with rs232 port (com port) via db9 connector ? one or two current transformers (c ts), preferably 2,000:1 turns ratio ? for software development (mpu code): ? signum ice (in circuit emulator): adm-51 ? http://www.signum.com ? keil 8051 ?c? compiler kit: ca51 http://www.keil.co m/c51/ca51kit.htm , http://www.keil.com/product/sales.htm 1.6 demo board test setup figure 1-1 shows the basic connections of the demo b oards plus debug boards with the external equipment. spacer removed 5vdc power debug board demo board 5vdc power host pc figure 1-1: demo board: basic connections the debug board can be plugged into j2 of the demo board. one spacer of the debug board should be removed, as shown in figure 1-1 . alternatively, both boards can be co nnected using a flat ribbon cable, as shown in figure 1-2 . a male header has to be soldered to j3 of the debug board, and the female-to-female flat ribbon cable is not supplied with the demo kit (use digi-key p/n a3aka-1606m-nd or similar). page: 10 of 83 ? 2007-2008 teridian semiconductor corporation v1.5
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 11 of 83 5vdc power ribbon cable 5vdc power debug board demo board host pc figure 1-2: demo board: ribbon cable connections the 71m6531 demo board block diagram is shown in figure 1-3 . it consists of a stand-alone meter demo board and an optional debug board. the demo board contains all circuits necessary for operation as a meter, including display, calibration led, and power supply. the debug board, when not sharing a power supply with the meter, is optically isolated from the meter and interfaces to a pc through a 9 pin serial port. connections to the external signals to be measured, i.e. scaled ac voltages and current signals derived from shunt resistors or current transformers, are provided on the rear side of the demo board. it is recommended to set up the demo board with no live ac voltage connected, and to connect live ac voltages only after th e user is familiar with the demo system.
71m6531 demo board user?s manual page: 12 of 83 ? 2007-2008 teridian semiconductor corporation v1.5 figure 1-3: the teridian 6531 demo board with debug board block diagram (ct configuration) note: all analog input signals are referenced to the v3p3a net (3.3v power supply to the chip). 1.6.1 power supply setup there are several choices for meter the power supply: ? internal (using the ac line voltage). the internal power supply is only suitable when the line voltage exceeds 220v rms. ? external 5vdc connector (j1) on the demo board ? e xternal 5vdc connector (j1) on the debug board. the power supply jumper, jp1, must be consistent with the power supply choice. jp1 connects the ac line voltage to the internal power supply. this jumper should usually be left in place. when the demo board is in shunt configuration, the shunt resistor has to be connected as shown in figure 1-7 for the board to be powered via j1. alternat ively, a jumper cable between any header labeled v3p3 and the neutral terminal (j9) can be supplied. demonstration meter ia neutral ia v3p3 va 3.3v va gnd v3p3 gnd jp1 5v dc eeprom v3p3 v3p3 ice connector iso wh varh tx rx 5v dc v5_dbg gnd_dbg v5_dbg v5_dbg rs-232 interface db9 to pc com port gnd_dbg v5_dbg fpga 4/12/2007 v5_ni ce heartbeat (1hz) mpu heartbeat (5hz) debug board (optional) 6531 single chip meter tmuxout cktest 3.3v lcd display dio6 dio7 dio4 dio5 rtm interface load a ib load b vb ib jp21 external current transformers j2 gnd n/c n/c 4 15, 16 13, 14 6 6 8 12 10 v3p3d n/c 3 1 2 5, 7, 9, 11 db9 to pc com port on-board components powered by v3p3d vb iso iso iso iso iso iso
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 13 of 83 1.6.2 cable for serial connection for connection of the db9 serial port to a pc, either a straight or a so-called ?null-modem? cable may be used. jp1 and jp2 are plugged in for the straight cable, and jp3/jp4 are empty. t he jumper configuration is reversed for the null-modem cable, as shown in table 1-3 . cable configuration mode jumpers on debug board jp1 jp2 jp3 jp4 straight cable default installed installed -- -- null-modem cable alternative -- -- installed installed table 1-1: jumper settings on debug board jp1 through jp4 can also be used to alter the connecti on when the pc is not configured as a dce device. table 1-2 shows the connections necessary for the st raight db9 cable and the pin definitions. pc pin function demo board pin 2 tx 2 3 rx 3 5 signal ground 5 table 1-2: straight cable connections table 1-3 shows the connections necessary for the null-modem db9 cable and the pin definitions. pc pin function demo board pin 2 tx 3 3 rx 2 5 signal ground 5 table 1-3: null-modem cable connections 1.6.3 checking operation a few seconds after power up, the lcd display on the demo board should briefly display the following welcome text: h e l l 0 after the ?hello? text, the lcd should display the following information: w h and: 0. 0 0 1 the text ?wh? indicates that accumulated watt-hours are displayed. in the case shown above, 0.001 wh were accumulated. the display will be cycling from numer ic to text, indicating activity of the mpu inside the d/f. 71m6531 in mission mode, the display can be cycled to display varh, pf and other parameters by pressing the pushbutton (pb).
71m6531 demo board user?s manual 1.6.4 serial connection setup for the pc after connecting the db9 serial port to a pc, start the hyperterminal application (or any other suitable communication program) and create a session using the communication parameters shown in table 1-4 . setup paramete r v alue port speed (baud) 9600/300 g data bits 8 parity none stop bits 1 flow control xon/xoff g depending on the jumper setting at jp12 table 1-4: com port setup parameters hyperterminal can be found by selecting programs ? accessories ? communications from the windows ? start menu. the connection parameters are configured by selecting file ? properties and then by pressing the configure button (see figure 1-4 ). a setup file (file name ?demo board connection.ht?) for hyperterminal that can be loaded with file ? open is also provided with the tools and utilities on the supplied cd-rom. figure 1-4: port configuration setup note: port parameters can only be adjusted when the connection is not active. the disconnect button, as shown in figure 1-5 must be clicked in order to disconnect the port. page: 14 of 83 ? 2007-2008 teridian semiconductor corporation v1.5
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 15 of 83 figure 1-5: hyperterminal sample window with disconnect button 1.7 using the demo board the 71m6531 demo board is a ready-to-use meter prepar ed for use with an external shunt resistor. using the demo board involves communicating with the demo code. an interactive command line interface (cli) is available as part of the demo code. the cl i allows modifications to the metering parameters, access to the eeprom, initiation of auto-calibration sequences, select ion of the displayed parameters, changing calibration factors and many more operations. before evaluating the 71m6531 demo board, users should get familiar with the commands and responses of the cli. a complete description of the cli is provided in section 1.7.2 . 1.7.1 cycling the lcd display the demo codes for the 71m6531 demo board allow cycling of the display using the pb button. by briefly pressing the button, the next available parameter from table 1-5 is selected. this makes it easy to navigate various displays for demo boards that do not have the cli.
71m6531 demo board user?s manual page: 16 of 83 ? 2007-2008 teridian semiconductor corporation v1.5 step text display displayed paramete r 1 wh accumulated real energy [wh]. the default display setting after power-up or reset. 2 varh accumulated reactive energy [varh]. 3 hours expired hours after power-up or reset 4 time time of day (hh.mm.ss). 5 date date (yyyy.mm.dd). 6 pf current power factor. 7 ed g es count of zero crossi ngs in the last accumulation interval. 8 pulses number of emitted pulses. 8 a rms current at phase a input [a]. 8 v rms voltage at the va_in input [v]. 8 bat v measured battery voltage [v]. 8 delta t temperature difference from calibration temperature. displayed in 0.1c table 1-5: selectable display options 1.7.2 serial command line interface (cli) once, communication to the demo board is establis hed, press and the demo program prompt (? > ?) should appear. type >i to verify that the demo program version is revision 4p6q or later. users should familiarize themselves with the demo program commands described in the tables below. the demo program (demo code) is compiled with eep rom specified as the non-volatile memory. this means that the default calibration fa ctors are stored in flash memory wh ile the calibration factors resulting from an actual calibration are stored in eeprom. the tables below describe the commands in detail. type ??? for a display of available commands.
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 17 of 83 commands for ce data access: ] ce data access remarks description: allows user to read from and write to ce data space. usage: ] [starting ce data address] [option]?[option] command combinations: ]??? read consecutive 16-bit words in decimal ]$$$ read consecutive 16-bit words in hex ]u update . e0) default version of ce data in eeprom important: the ce must be stopped (c before issuing this command! example: ]40$$$ reads s 0x40, 0x41 and 0x42. ce data word ]7e=123 45678=9876abcd writes two words starting @ 0x7e ce da from rds are in 4-byte (32- commands for mpu/xdata access: ta space is the address range 0x1000 to 0x13ff. all ce data wo bit) format. the offset of 0x1000 does not have to be entered when using the ] command, thus typing ]a? will access the 32-bit word located at the byte address 0x1000 + 4 * a = 0x1028. ) mpu data access remarks d escription: and write allows user to read from to mpu data space. usage: ) [starting mpu data address] [option]?[option] command c : e 32-bit words in decimal ombinations )??? read three consecutiv )$$$ read three consecutive 32-bit words in hex )a=n=m write the values n and m to two consecutive addresses starting at a example: )08$$$$ 0x0c, 0x10, 0x14 reads data words 0x08, )04=1234 5678=9876abcd writes two words starting @ 0x04 mpu o xdata for th . all mpu data words r space is the address range e mp u xram (0x0000 to 0x0fff) are in 4-byte (32-bit) format. typing ]a? will access the 32-bit word located at the byte address 4 * a = 0x28. the energy accumulation registers of the demo code can be accessed by typing two question marks (????).
71m6531 demo board user?s manual commands for i/o ram (configuration ram) and sfr control: r dio and sfr control remarks description: allows the user to read from and writ e to i/o ram and special function registers (sfrs). usage: r [option] [r egister] ? [option] command combinations: rix? select i/o ram location x (0x2000 offset is automati- cally added) rx? select internal sfr at address x rx???... read consecutive sfr registers in decimal rx$$$... read consecutive registers in hex notation example: ri60$$$$ read all four rtm probe registers dio or configuration ram space is the address range 0x2000 to 0x20ff. this ram contains registers used for configuring basic hardware and functional properties of the 71m6531d/f and is organized in bytes (8 bits). the 0x2000 offset is automatically added when the command ri is typed. the sfrs (special function registers) are located in internal ram of the 80515 core, starting at address 0x80. commands for eeprom control: ee eeprom control remarks description: allows user to enable read and write to eeprom. usage: ee [option] [arguments] command combinations: eecn eeprom access (1 ? enable, 0 ? disable) eera.b read eeprom at address 'a' for 'b' bytes. eee erase the eeprom eesabc..xyz write characters to buffer (sets write length) eeta transmit buffer to eeprom at address 'a'. eewa.b...z write values to buffer example: eeshello; eet$0210 writes 'hello' starting at eeprom address 0x210. the eec1 command must be issued before the eeprom in terface can be used. the execution of the eee command takes several seconds. during this time, no other commands can be entered. auxiliary commands: auxiliary remarks description: various commands: , typing a comma (?,?) repeats the command issued from the previous command line. this is very helpful when examining the value at a certain address over time, such as the xram address for the temperature. / the slash (?/?) is useful to separate comments from commands when sending macro te xt files via the serial interface. all characters in a line after the slash are ignored. ? displays the help menu. clc enables communication via hex records. bt commands execution of a battery test. page: 18 of 83 ? 2007-2008 teridian semiconductor corporation v1.5
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 19 of 83 commands controlling the ce: c compute engine control remarks description: allows the user to enable and configure the compute engine. usage: c [option] [argument] command combinations: cen compute engine enable (1 ? enable, 0 ? disable) ctn select input n for tmux output pin. enter n in hex notation. cren rtm output control (1 ? enable, 0 ? disable) crsa.b.c.d selects ce addresses for rtm output (maximum of four) example: ce0 disables the ce ct1e selects the ce_busy signal for the tmux output pin calibration commands: cl calibration control remarks description: calibration-related commands. a full auto-calibr ation can be implemented by compiling the demo code with auto-calibration selected as an option. due to space restrictions, the auto-calibration is not implemented in the demo code supplied with the demo boards. usage: cl [option] command combinations: clc loads a calibration via serial port clb starts an auto-calibration sequence cld restores calibration to defaults clr restores calibration from eeprom cls saves calibration to eeprom commands for identification and information: i information messages remarks description: allows user to display information messages. usage: i example: i returns the demo code version the i command is used to identify the revisi ons of demo code and the contained ce code.
71m6531 demo board user?s manual commands for controlling the metering values shown on the lcd display: m meter display control (lcd) remarks description: allows user to select in ternal variables to be displayed. usage: m [option]. [option] command combinations: m kwh total consumption (display wraps around at 999.999) m1 temperature (c delta from nominal) m2 frequency (hz) m3. [phase] kwh total consumption (display wraps around at 999.999) m4. [phase] kwh total inverse consumption (display wraps around at 999.999) m5. [phase] kvarh total consumpti on (display wraps around at 999.999) m6. [phase] kvah total inverse consumption (display wraps around at 999.999) m7. [phase] vah total (display wraps around at 999.999) m9 real time clock m10 calendar date m13. n main edge count (n = 0: accumulated, n = 1: last second) m17 battery voltage. display will re turn to m3 afte r a few seconds. example: m3.1 displays wh total consumption of phase a. displays for total consumption wrap around at 999.999kwh (or kvarh, kvah) due to the number of available display digits. internal registers (counters) of the demo code are 64 bits wide and do not wrap around. t a r f c he internal accumulators in the demo code use 64 bits and will neither overflow nor wrap round under normal circumstances. the restriction to only six digits is due to the equirement to provide one digit showing the display mode that is separated by a blank digit rom the displayed values. ommands for controlling the rms values shown on the lcd display: mr meter rms display control (lcd) remarks description: allows user to select me ter rms display for voltage or current. usage: mr [option]. [option] command combinations: mr1. [phase] displays instantaneous rms current mr2. [phase] displays instantaneous rms voltage example: mr1.2 displays phase b rms current. commands for controlling the mpu power save mode: ps power save mode remarks description: enters power save mode disables ce, adc, ckout, eck, rtm, tmux vref, and serial port, sets mpu clock to 38.4khz. usage: ps return to normal mode is achieved by issuing a hardware reset. page: 20 of 83 ? 2007-2008 teridian semiconductor corporation v1.5
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 21 of 83 commands for controlling the rtc: rt real time clock control remarks description: allows the user to read and set the real time clock. usage: rt [option] [value] ? [value] command combinations: rtdy.m.d.w: day of week (year, month, day, weekday [1 = sunday]). weekday is automatically set if omitted. rtr read real time clock. rtth.m.s time of day: (hr, min, sec). rtas.t real time adjust: (speed, trim) example: rtd05.03.17.5 programs t he rtc to thursday, 3/17/2005 reset commands: z, w reset remarks description: allows the user to cause soft or watchdog resets usage: z soft reset w simulates watchdog reset the z command acts like a hardware reset. the energy accumulators in xram will retain their values. commands for controlling the lcd and sleep modes (when in brownout mode): b power mode control remarks description: allows the user switch to lcd and sleep mode when the 71m6531d/f is in brownout mode. usage: b [option] [value] command combinations: bl enters lcd mode bs enters sleep mode bwsn prepares sleep mode with the wakeup timer set to n seconds bwmm prepares sleep mode with the wakeup timer set to m minutes example: bws8 bs enters sleep mode with the wakeup timer set to 8 seconds. the 71m6531d/f will enter sleep mode and return to brownout mode after 8 seconds.
71m6531 demo board user?s manual page: 22 of 83 ? 2007-2008 teridian semiconductor corporation v1.5 commands for error recording: er error recording remarks description: allows the user display and clear the error log. usage: er [option] [value] command combinations: erc clears all errors from error log erd displays error log ers+n enters error number n in error log example: ers+10 enters error number 10 in error log 1.7.3 communicating via intel hex records communication with the 71m6531d/f ic, especially by computers and/or ate, may also be accomplished using a simplified protocol based on intel hex records. these records can still be sent and received with an ordinary terminal, and coding and decoding of co mmands and responses is straight-forward. using the hex-record format intel's hex-record format allows program or data files to be encoded in a printable (ascii) format, allowing editing of the object file with standard tools and easy fi le transfer between a host and target. an individual hex-record is a single line in a file composed of one or several hex-records. entering ?clc? from the text-based command lin e interface enables the hex-record interface. hex-records are character strings made of several fields which specify the record type, record length, memory address, data, and checksum. each byte of binary data is encoded as a 2-character hexadecimal number: the first ascii character repr esenting the high-order 4 bits, and the second the low-order 4 bits of the byte. the six fields that comprise a hex-record are defined in table 1-6 . field name characters description 1 start code 1 an ascii colon (":") 2 byte count 2 the count of the c haracter pairs in the data field. 3 address 4 the 2-byte address at which the data field is to be loaded into memory. this is the physical xram or i/o ram address, not the 4-byte address used by the command-line interface (cli). 4 type 2 00, 01, or 02. 5 data 0-2n from 0 to n bytes of executable code, or memory loadable data. n is normally 20 hex (32 decimal) or less. 6 checksum 2 the least significant byte of the two's complement sum of the values represented by all the pairs of characters in the record except the start code and checksum. table 1-6: fields of a hex record each record may be terminated with a cr/lf/null character. accuracy of transmission is ensured by the byte count and checksum fields. this is important when series of values such as calibration constants are transmitted to a meter, e.g. by ate equipment in a fa ctory setting. when entering hex records manually, the user may also choose ?ff? (?wild card?) as the checks um. in this case, the demo code omits comparing the checksum with the received record(s). this is how the checksum is calc ulated manually (if necessary): 1) the hex values of all bytes (except st art code and checksum itself) are added up. 2) the last two hex digits are subtracted from 0xff. 3) the value 0x01 is added.
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 23 of 83 as opposed to the standardized hex-records that offe r three possible types (data, termination, segment base), six different types are supported for communica ting with the 71m6531d/f. these data types basically encode command types (read/write) along with the data source or destination, as listed in table 1-7 . number code function 1 00 write ce data record, contains data and 16-bit ce address (ce data ram is located at 0x1000). 2 01 end of file (quit) record, a file termi nation record. contains no data. this record has to be the last line of the file, and only one record per file is permitted. the byte pattern is always ':00000001ff'. upon receipt of this reco rd, the demo code will transfer the received data into non-volatile memory (eeprom). 3 02 alternate form of write ce data record (optional). ce data ram is located at 0x1000. 4 03 read ce data record, contains empty data field and 16-bit ce address (optional). ce data ram is located at 0x1000. 5 04 write mpu or i/o ram data record , contains data and 16-bit mpu address. 6 05 read mpu or i/o ram data record, co ntains empty data field and 16-bit mpu address (optional). i/o ram is located at 0x2000. 7 06 write rtc data record, contains data and 16-bit rtc address. 8 07 read rtc data record, contains empty data field and 16-bit rtc address (optional). 9 08 write sfr data record, contains data and 16-bit sfr address (optional). the msb is always zero (0). 10 09 read sfr data record, contains empty data field and 16-bit sfr address (optional). table 1-7: data (command) types table 1-8 lists a few examples of hex records. hex record function :08 0000 06 00 00 0c 03 18 05 06 00 ff writes (06) eight bytes (08) to rtc, setting the rtc to zero seconds (00), minutes (00), 12 hours (0c), wednesday (03), 24 th (18) of may (05), 2006 (06). uses the wild card checksum. :10 0010 00 00004000 00004000 00004000 00004000 e8 :00 0000 01 ff writes the default values (0x4000) for the calibration constants cal_ia, cal_ib, cal_va, and cal_vc to the xram (00), starting at address 0x10 (0010). the second command causes the demo code to write the data to permanent storage. :10 1020 03 ff causes the demo board to display the ce data from address 0x1020 to 0x102f table 1-8: hex record examples the demo board will not echo any inputs from the te rminal (they screen will stay blank except for the asterisk ( * ) issued after the user enters ). it is useful to configure hyperterminal for ?auto-echo?. this can be done by selecting ?pr operties? from the ?file? menu, then clicking on the ?settings? tab and clicking the ?ascii setup? button. no key is necessary at the end of a manually entered record.
71m6531 demo board user?s manual spaces in between the fields (to increase readability), as in the example above, are ignored by the demo boards. if a hex record is accepted, the demo board returns a " ! ". if the hex record is not accepted, the demo board sends a " ? " and other text, depending on the context (only the 16kb demo code will send text). when only a partial record is entered, the demo boar d will time out after around 30 seconds and then send < lf>. a number of pre-assembled hex records is supplied with the demo code. it is easier to send a pre-assem- bled record using the ?send text file? feature in the ?transfer? menu of hyperterminal, than assembling hex record from scratch. the pre-assembled hex records are contained in a zip file named 6531_scripts.zip on the cd-rom supplied with the demo kits. table 1-9 shows the records available and their function. hex record name function set_6531_defaults.txt sets the default configuration, including all ce variables. transferring this record is necessary when data in the eeprom is lost or compromised. read_6531_temp.txt displays the current temperature reading from the ce set_6531_temp.txt this record can be edited to set the nominal (calibration) temperature read_6531_power.txt displays the valid power data read_6531_ce.txt displays ce data from memory locations 0x1020 to 0x10ff read_6531_config.txt displays configuration data. this hex record includes comment text helping to interpret the received data. set_6531_rtm.txt sets up the real-time monitor table 1-9: pre-assembled hex records 1.7.4 using the battery modes the 71m6531d/f is in so-called mission mode, as long as 3.3vdc is supplied to the v3p3sys pin. if this voltage is below the minimum required operating voltag e which is usually indicated by v1 < 1.6 (internal vbias voltage), and if no battery is connected to the vbat pin, the chip is powered off. battery modes can be used if a battery or other dc so urce supplying a dc voltage with in the operating limits for the battery input is applied to the battery pin (vbat, pin 49) of the chip. on the demo board, the battery should be connected to pin 2 (+) and 3 (-) of jp8. in order to prevent corruption of external memory, which could occur when main power is removed from the demo board while no battery is present, the demo code is shipped with the battery modes disabled . when the battery modes are disabled, the mpu will be halted once it enters brownout mode, even when a battery is present. see section 1.10.2 for instruction on how to enable battery modes. if the main power source (internal or external power supply) is removed while a battery is connected to jp8 as described above, and if the battery modes are enab led with header jp12, the 71m6531d/f automatically enters brownout mode. the demo code will then automatically transition from brownout mode to sleep mode. by pressing the pushbutton pb, the chip is temporarily brought back to lcd mode. after a few seconds in lcd mode, the chip returns to sleep mode. by pressing the reset pushbutton while the chip is in sleep mode, the chip will enter brownout mode. both the reset and pb buttons are powered by the battery voltage (vbat). in brownout mode, the analog functions are disabled, and the mpu functions at very low speed. dio pins and the uart are still functional. if the chip supports the command line interface, it will signal brownout page: 24 of 83 ? 2007-2008 teridian semiconductor corporation v1.5
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 25 of 83 mode, and the command prompt ?b? will be visible on the terminal connected to the demo board, followed by the ?>? sign: b> the lcd displays a decimal dot in the left-most digit to indicate that it is in brownout mode, as shown below: . h e l l o the following commands can be entered via the cli in brownout mode: ? bl ? enters lcd mode ? bs ? enters sleep mode. ? bwsn ? enters sleep mode for n seconds, then returns to brownout mode ? bwmm ? enters sleep mode for m minutes, then returns to brownout mode in sleep mode, almost all functions are disabled. only the rtc and the wakeup timer are still active. the wakeup signal from the timer and the pushbutton (sw2 on the demo board) take the 71m6531d/f back to brownout mode. a hardware reset, while in any battery mode, takes the 71m6531d/f back to brownout mode. 1.8 using the demo board for metering functions 1.8.1 modifying demo code to ct or shunt mode script files contained in the cd-rom shipped with t he demo kit can be used to modify the constants used in the demo code from ct to shunt mode or vi ce versa. three script files are available: 1. 6531ctct.txt sets 6531 demo code for ia: 2000:1 ct (imax = 208a) and ib: 2000:1 ct (imaxb = 208a) 2. 6531ctshunt.txt: ia: 2000:1 ct (imax = 208a) ib: 400 ? 6531shuntct.txt: ia: 400 ? to apply a script file, select ?transfer -> send_t ext_file? from the hyperterminal user interface. 1.8.2 using the demo board in shunt and ct modes the demo board may be used with current shunt sensors of 400 ? resistance or current transformers (cts). it is programmable for a kh factor of 1.0 and (see section 0 for adjusting the demo board for current transformers). section 1.8.6 describes proper wiring and safety precautions for shunt operation. once, voltage is applied and load current is flowing, t he red led d5 will flash each time an energy sum of 1.0 wh is collected. the lcd display will show the accumulated energy in wh when set to display mode 3 (command >m3 via the serial interface). similarly, the red led d6 will flash each time an energy sum of 1.0 varh is collected. the lcd display will show the accumulated energy in varh when set to display mode 5 (command >m5 via the serial interface). the d6531n12a2 demo boards can be operated with cts on channel b, which is equipped with the proper burden resistors for 2000:1 cts.
71m6531 demo board user?s manual page: 26 of 83 ? 2007-2008 teridian semiconductor corporation v1.5 if desired, channel a can be modified for operation with a 2000:1 ct as follows: 1) remove r24 and r25. insert a 1.7 ? resistor each for r24 and for r25. 2) connect the output of the ct to terminal j3 on the bottom of the board. 3) using the command line interface, change imaxa to decimal 2080 ( >)a=+2080 ) and wrate to 1556 ( >]21=+1556 ) 4) remove r88, install l12 and l9. using the command line interface, change imaxa and wrate by sending the text file as described in 1.8.1 . of course, other winding ratios for cts are possible. adjusting the board to any ct winding ratio is described in 1.8.4 . if desired, channel a can be modified for operation with a shunt resistor as follows: 1) remove r24 and r25. insert a 10k ? resistor for r24. 2) install r88, remove l12 and l9. 3) connect the shunt resistor wiring harness as shown in figure 1-7 . using the command line interface, change imaxa and wrate by sending the text file as described in 1.8.1 . 1.8.3 adjusting the kh factor for the demo board the 71m6531 demo board is shipped with a pre-programm ed scaling factor kh of 1.0, i.e. 1.0 wh per pulse. in order to be used with a calibrated load or a meter calibration system, the board should be connected to the ac power source using the spade terminals on th e bottom of the board. the current transformer or shunt resistor should be connected to the dual-pin headers on the bottom of the board. the kh value can be derived by reading the values for imax and vmax (i.e. the rms current and voltage values that correspond to the 250mv maximum input signal to the ic), and inserting them in the following equation for kh: kh = imax * vmax * 47.1132 / ( in_8 * wrate * n acc * x) = 0.99967 wh/pulse. where imax is the current scaling factor, vmax is the voltage scaling factor, in_8 is the current shunt gain factor, wrate is the ce variable controlling kh, n acc is the product of the i/o ram registers pre_samps and sum_cycles , and x is the pulse frequency factor derived from the ce variables pulse_slow and pulse_fast . the small deviation between the adjust ed kh of 0.99967 and the ideal kh of 1.0 is covered by calibration. the default values used for the 71m6531 demo board are: wrate : 826 imax : 442 vmax : 600 in_8: 1 n acc : 2520 x: 6 explanation of factors used in the kh calculation: wrate : the factor input by the user to determine kh imax : the current input scaling factor, i.e. the inpu t current generating 176.8mvrms at the ia, ib, or ic input pins of the 71m6531d/f. 176.8mv rms is equivalent to 250mv peak. vmax : the voltage input scaling fact or, i.e. the voltage generati ng 176.8mvrms at the va/vb/vc input pins of the 71m6531d/f in_8 : the setting for the additional computational gai n (8 or 1) determined by the ce register ia_shunt n acc : the number of samples per accumulation interval, i.e. pre_samps * sum_cycles x: the pulse rate control factor determined by the ce registers pulse_slow and pulse_fast almost any desired kh factor can be selected fo r the demo board by resolving the formula for wrate : wrate = ( imax * vmax * 47.1132) / (kh * in_8 * n acc * x) for the kh of 1.0wh, the value 826 (decimal) should be entered for wrate at location 0x21 (using the cli command >]21=+826 ).
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 27 of 83 1.8.4 adjusting the demo boards to different ct winding ratios in general, when imax is applied to the primary side of the ct, the voltage v in at the ia or ib input of the 71m6531d/f ic is determined by the following formula: v in = r * i = r * imax /n where n = transformer winding ratio, r = resi stor on the secondary side (burden resistor) if, for example, imax = 208a are applied to a ct with a 2500:1 ra tio, only 83.2ma will be generated on the secondary side, causing only 141mv. in this case the demo board can be adapt ed with the steps outlined below: 1) the formula n imax mv r x 8.176 = is applied to calculate the new resistor r x . we calculate r x to 2.115 2) changing the resistors r24/r25 or r106/r107 to a combined resistance of 2.115 (for each pair) will cause the desired voltage drop of 176.8mv appearing at the ia, or ib inputs of the 71m6531d/f ic. 3) wrate should be adjusted to achieve the desired kh factor, as described in 1.8.3 . simply scaling imax is not recommended, since peak voltages at the 71m6531d/f inputs should always be in the range of 0 through 250mv (equivalent to 176.8mv rms). if a ct with a much lower winding ratio than 1:2,000 is used, higher secondary currents will resul t, causing excessive voltages at the 71m6531d/f inputs. conversely, cts with much higher ratio will tend to decrease the useable signal voltage range at the 71m6531d/f inputs and may thus decrease resolution. 1.8.5 adjusting the demo boards to voltage transformers or different voltage dividers the 71m6531 demo board comes equipped with its ow n network of resistor dividers for voltage measurement mounted on the pcb. the resistor values result in a ratio of 1:3,393.933. this means that vmax equals 276.78mv*3,393.933 = 600v. a large value for vmax has been selected in order to have headroom for overvoltages. this choice need not be of concern, since the adc in the 71m6531d/f has enough resolution, even when operating at 120vrms or 240vrms. if a different set of voltage dividers or an external voltage transformer is to be used, scaling techniques similar to those applied for the current transformer should be used. in the following example we assume that the line voltage is not applied to the resistor divider for va formed by r15-r21, r26-r31, and r32, but to a voltage transformer with a ratio n of 20:1, followed by a simple resistor divider. we also assume that we want to maintain the value for vmax at 600v to provide headroom for large voltage excursions. when applying vmax at the primary side of the tr ansformer, the secondary voltage v s is: v s = vmax / n v s is scaled by the resi stor divider ratio r r . when the input voltage to the voltage channel of the 71m6531d/f is the desired 176.8mv, v s is then given by: v s = r r * 176.8mv resolving for r r , we get: r r = ( vmax / n) / 176.8mv = (600v / 30) / 176.8mv = 170.45 this divider ratio can be implemented, for example, with a combination of one 16.95k and one 100 resistor. 1.8.6 wiring of the demo board and a shunt resistor the 71m6531 demo kits are shipped with a pre-wired shunt resistor (400 ), as shown in figure 1-6 . this shunt resistor has to be connected to the 71m6531 demo board, as shown in figure 1-7 .
71m6531 demo board user?s manual page: 28 of 83 ? 2007-2008 teridian semiconductor corporation v1.5 figure 1-6: pre-wired shunt resistor important safety precautions apply wh en operating the demo board in shunt mode: in shunt configuration, the whole demo board will be at line voltage! touching the board or any components must be avoided! it is highly recommended to isolate demo board and debug board (when used) and to provide separate power supplies for the demo board and debug board. e mulators or other test equipment should never be connected to a live meter without proper solation! i from neutral to load to ia_in to ia reference to meter power supply
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 29 of 83 live neutral shunt load 2.5mohm 750 ohm power supply d6531n12a2 demo board low crosstalk demands that these current paths not share a common wire. figure 1-7: connection of the pre-wired shunt resistor while connecting wires to j9 and j4, care should be taken to prevent shorting between line and neutral. before connecting the demo board to main power, the resistance between j9 and j4 (live and neutral) must be checked! if the resistance is below 100 , the wiring must be re-checked! only one shunt resistor can be used in a meter, since isolation cannot be maintained when using more than one shunt resistor. these wires must be connected directly at the shunt resistor red white blue va_in voltage divider va v3p3a gnd ia 71m6531 r15-r18 r32 v3p3 j3 c9 c6 j9 neutral 13 refa 1000pf vb r6 r7 power supply and reference for voltage measurement 10/24/2007 2 r88 l9 (nc) l12 (nc) reference for current measurement signal for current measurement j4
71m6531 demo board user?s manual page: 30 of 83 ? 2007-2008 teridian semiconductor corporation v1.5 1.9 calibration parameters 1.9.1 general calibration procedure any calibration method can be used with the 71m6531d/ f chips. this demo board user?s manual presents calibration methods with three or five measurements as recommended methods, because they work with most manual calibration systems based on counting "pulses" (emitted by leds on the meter). naturally, a meter in mass production will be equipped with special calibration code offering capabilities beyond those of the demo code. it is basically possible to calibrate using voltage and current readings, with or without pulses involved. for this purpose, the mpu demo code can be modified to display averaged voltage and current values (as opposed to momentary values). also, automated calibration equipment can communicate with the demo boards via the serial interface and extract voltage and current readings. this is possible even with the unmodified demo code. a complete calibration procedure is given in section 2.1.3 of this manual. regardless of the calibration procedur e used, parameters (calibration const ants) will result that will have to be applied to the 71m6531d/f chip in order to make the chip apply the modified gains and phase shifts necessary for accurate operation. table 1-10 shows the names of the calibration constants, their function, and their location in the xram. again, the command line interface can be used to store the calibration constants in their respective xram addresses. for example, the command >]11=+16302 stores the decimal value 16302 in the xram locati on controlling the gain of the voltage channel ( cal_va ). constant ce address (hex) description cal_va cal_vb 0x11 0x13 adjusts the gain of the volt age channel. +16384 is the typical value. the gain is directly proportional to the cal parameter. allowed range is 0 to 32767. if the gain is 1% slow, cal should be increased by 1%. cal_ia cal_ib 0x10 0x12 adjusts the gain of the curr ent channels. +16384 is the typical value. the gain is directly proportional to the cal parameter. allowed range is 0 to 32767. if the gain is 1% slow, cal should be increased by 1%. phadj_a phadj_b 0x18 0x19 this constant controls the ct phase compensation. no compensation occurs when phadj = 0. as phadj is increased, more compensa tion is introduced. note: phadj_b 1 applies to 3w/1-phase systems. table 1-10: xram locations for calibration constants 1.9.2 updating the 6531_demo.hex file the d_merge program updates the 6531_demo.hex file with the values contained in the macro file. this program is executed from a dos command line window. executing the d_merge program with no arguments will display the syntax description. to merge macro.txt and old_6531_demo.hex into new_6531_demo.hex, use the command: d_merge old_6531_demo.hex macro.txt new_6531_demo.hex the new hex file can be written to the 71m6531d/f through the ice port using the adm51 in-circuit emulator. this step makes the calibration to the meter permanent.
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 31 of 83 1.9.3 calibration macro file the macro file in figure 1-8 contains a sequence of commands to be used for demo boards that provide a serial command line interface (cli). it is a simple text file and can be created with notepad or an equivalent ascii editor program. the file is executed with hyperterminal?s transfer->send text file command. ]10=+16022/ cal_ia (gain=cal_ia/16384) ]11=+16381/ cal_va (gain=cal_va/16384) ]12=+16019/ cal_ib (gain=cal_ib/16384) ]13=+16370/ cal_vb (gain=cal_vb/16384) ]18=+115/ phadj_a (default 0) ]19=+113/ phadj_b (default 0) ce1 figure 1-8: typical calibration macro file it is possible to send the calibration macro file to the 71m6531d/f for ?temporary? calibration. this will temporarily change the ce data values. upon power up, these values are refreshed back to the default values stored in flash memory. thus, until the flash me mory is updated, the macro file must be loaded each time the part is powered up. the macro file is run by first issuing the ce0 command to turn off the compute engine and then sending the file with the transfer ? send text file procedure. turning off the ce before changing ce constants is not a har dware requirement of the chip, but is recommended because of the way the demo code is written. note: do not use the transfer ? send file command! 1.9.4 updating calibration da ta in eeprom or flash it is possible to make data permanent that had been entered temporarily into the xram. the transfer to eeprom is done using the follow ing serial interface command: >cls thus, after transferring calibration data with manual seri al interface commands or with a macro file, all that has to be done is invoking the cls command. it is also possible to write calibration data to flash memory. this is done using the following serial interface command: >]u 1.9.5 loading the 6531_demo.hex fi le into the demo board hardware interface for programming: the 71m6531d/f ic provides an interface for loading code into the internal flash memory. this interface consists of the following signals: e_rxtx (data), e_tclk (clock), e_rst (reset), ice_e (ice enable) these signals, along with v3p3d and gnd are available on the emulator header j14. production meters may be equipped with much simpler programming connectors, e.g. a 6x1 header. programming of the flash memory requ ires a specific in-circuit emulat or, the adm51 by signum systems (http//www.signumsystems.com) or the flash program mer (tfp-2) provided by teridian semiconductor. chips may also be programmed before they are soldered to the board. the tgp1 gang programmer suitable for high-volume production is available from teridian. in-circuit emulator: if firmware exists in the 71m6531d/f flash memory, this memory has to be erased before loading a new file into memory. figure 1-9 and figure 1-10 show the emulator software active. in order to erase the flash memory, the reset button of the emulator software graphical interface has to be clicked followed by the erase button ( figure 1-9 ). once the flash memory is erased, the new file can be loaded using the commands file followed by load. the dialog box shown in figure 1-10 will then appear making it possible to select the file to be loaded by clicking the browse button. once the file is selected, pressing the ok button will load the file into the flash memory of the 71m6531d/f ic.
71m6531 demo board user?s manual at this point, the emulator probe (cable) can be removed. once the 71m6531d/f ic is reset using the reset button on the demo board, the new code starts executing. figure 1-9: emulator window showing reset and erase buttons figure 1-10: emulator window showing erased flash memory and file load menu flash downloader module (tfp-2): follow the instructions given in the user manual for the tfp-2. page: 32 of 83 ? 2007-2008 teridian semiconductor corporation v1.5
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 33 of 83 emulators or other test equipment should never be connected to a live meter without proper isolation! usb isolators are available from v arious vendors (see the printed safety notice shipped with the emulator). 1.9.6 the programming interface of the 71m6531d/f tfp-2 and ice interface signals the signals listed in table 1-11 are necessary for communication between the flash programmer or ice and the 71m6531d/f. signal direction function a vailable on e_tclk output from 71m6531d/f data clock ice, tfp-2 e_rxtx bi-directional data input/output ice, tfp-2 e_rst bi-directional flash downloader reset (active low) ice, tfp-2 ice_ena input of 71m6531d/f enables ice interface tfp-2 table 1-11: flash programming interface signals the e_rst signal should only be driven by the ice or flash downloader when enabli ng the ice interface. e_rst must be floating at all other times. the same hardware and software precautions mentioned for emulator (ice) operation in section 1.11 apply to flash programmer operation.
71m6531 demo board user?s manual 1.10 demo code 1.10.1 demo code description the demo board is shipped preloaded with demo code revision 4p6q or later in the 71m6531d/f chip. the code revision can easily be verified by entering the command >i via the serial interface (see section 1.7.2 ). check with your local teridian representative or fae for the latest revision. firmware for the demo boards can be updated using either an in-circuit emulator (ice) or the flash programmer (tfp-2), as described in section 1.9.5 . the demo code is useful due to the following features: ? it pr ovides basic metering functions such as pulse generation, display of accumulated energy, frequency, date/time, and enables the user to evalua te the parameters of the metering ic such as accuracy, harmonic performance, etc. ? it ma intains and provides access to basic househo ld functions such as real-time clock (rtc). ? it p rovides access to control and display functions vi a the serial interface, enabling the user to view and modify a variety of meter parameters such as kh, calibration coefficients, temperature compensation etc. ? it pro vides libraries for access of low-level ic functions to serve as building blocks for code development. the demo code source files provided with the teridi an demo kits contain numerous routines that are not implemented. however, by re compiling the code using different compile-time options, many code variations with different features can be generated. see the software user?s guide (sug) for a complete description of the demo code. 1.10.2 accessing lcd and sleep modes from brownout mode header jp12 controls the behavior of the demo code when system power is off. the setting of jp12 is read on power up (or after reset), and controls the demo code as follows: ? jumper across pins 1-2 (gnd): the demo code will communicate at 9600bd. no transitions to sleep or lcd mode will be made from brownout mode. ? jumper across pins 2-3 (v3p3): the demo code will communicate at 300bd. transitions to sleep or lcd mode can be made from brownout mode. this operation mode requires connection of a battery or equivalent dc voltage at jp8. 1.10.3 demo code memory locations registers in mpu data ram can be accessed via the co mmand line interface (cli) or the using the method involving intel hex records. table 1-12 lists mpu addresses of interest. manipulating t he values in the mpu addresses enables the user to change the behavior of the meter. for example, if the current transformer external to the demo board is changed, a different imax value n may have to be applied. this can be done by changing the value in the address for imax using the cli command )=n . modifications to mpu data ram will not be main- tained when a reset or power-up occurs. changes to the mpu data ram can be made permanent by creating a macro file containing one or several cli commands and merging the macro file into the code using the d_merge utility described in section 1.9.2 . the following is an example showing how the battery bit can be set permanently by creating a new object file: a text file (battery.txt) is generated, containing the cli command )1=20 . the d_merge utility is called, using the following syntax ( 6531_demo.hex is the existing object file): d_merge 6531_demo.hex battery.txt new_6531_demo.hex now, the object file new_6531_demo.hex contains the battery bit. page: 34 of 83 ? 2007-2008 teridian semiconductor corporation v1.5
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 35 of 83 name purpose function or lsb value cli f l in bits x dat a ithrshlda starting current, element a sqsumilsb 02 16 = 0 in this position disables creep logic for both element a and b. )0 u 32 0x0000 config configure meter operation on the fly. bit 0:** reserved 0: va = vrms * irms; 1: 2 2 varhwhva += bit1: 1 = clears accumulators bit2:1 = calibration mode bit3:** reserved: 1 = enable tamper detection bit 5: 1 = battery modes enabled )1 n/a 8 0x0004 vpthrshld error if exceeded. sqsumv lsb 02 16 = )2 u 32 0x0005 ipthrshld error if exceeded. sqsumilsb 02 16 = )3 u 32 0x0009 y_cal_deg0 rtc adjust, provided for optional code. 100ppb )4 s 16 0x000d y_cal_deg1 rtc adjust, linear by temp. 10ppb* t, in 0.1 ?c )5 s 16 0x000f y_cal_deg2 rtc adjust, squared by temp. 1ppb* t 2 , in 0.1 ? c )6 s 16 0x0011 pulsewsource pulsevsource wh pulse source, varh pulse source selection see table for pulsewsource and pulsevsource )7 )8 u 8 0x0013 0x0014 vmax scaling maximum voltage for pcb, equivalent to 176mv at the va/vb pins 0.1v )9 u 16 0x0015 imaxa scaling maximum current for element a, equivalent to 176mv at the ia pin 0.1a )a u 16 0x0017 ppmc1 adc linear adjust with temperature ppm per degree centigrade )b s 16 0x0019 ppmc2 adc quadratic adjust with temperature ppm per degree centigrade squared )c s 16 0x001b pulse 3 source source for software pulse output 3 see table for pulsewsource and pulsevsource )d u 8 0x001d pulse 4 source source for software pulse output 4 see table for pulsewsource and pulsevsource )e u 8 0x001e scal duration for auto- calibration in seconds count of accumula tion intervals to be used for auto-calibration. )f u 16 0x001f vcal voltage value to be used for auto- calibration nominal rms voltage applied to all elements during auto- calibration (lsb = 0.1v). )10 u 16 0x0021
71m6531 demo board user?s manual name purpose function or lsb value cli for mat l in bits xdata ical current value to be used for autocalibra- tion nominal rms current applied to all elements during auto-calibra- tion (lsb = 0.1v). power factor must be 1. )11 u 16 0x0023 vthrshld voltage at which to measure frequency, zero crossing, etc. sqsumv lsb 02 16 = this feature is approximated using the ce?s sag detection.) )12 u 16 0x0025 pulsewidth maximum time pulse is on. t = (2*pulsewidth + 1)*397s, 0xff disables this feature. takes effect only at start-up. )13 s 16 0x0029 temp_nom nominal tempera- ture, the temperature at which calibration occurs. units of temp_raw , from ce. the value read from the ce must be entered at this address. )14 u 32 0x002b imaxb scaling maximum current for element b, equivalent to 176mv at the ia pin 0.1a )15 u 16 0x002f ithrshldb starting current, element b sqsumi 12 16 )16 u 32 0x0031 vbatmin minimum battery voltage. same as vbat, below )17 u 32 0x0035 calcount count of calibrations counts the number of times calibration is saved, to a maximum of 255 )18 u 8 0x0039 rtc copy nonvolatile copy of the most recent time the rtc was read. sec, min, hr, day, date, month, year )19 )1a )1b )1c )1d )1e )1f u 8 8 8 8 8 8 8 0x017a 0x017b 0x017c 0x017d 0x017e 0x017f 0x0180 deltat difference between raw temperature and temp_nom same units as temp_raw )20 s 32 0x003c frequency frequency units from ce. )21 u 32 0x0040 vbat* last measured battery voltage 9 2 adc n vbat = adc counts, logically shifted right by 9 bits. note: battery voltage is measured once per day, except when it is being displayed or requested with the bt command. )22 u 32 0x0044 page: 36 of 83 ? 2007-2008 teridian semiconductor corporation v1.5
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 37 of 83 name purpose function or lsb value cli f l in bits x dat a vrms_a vrms, element a sqsumv 02 16 )24 u 32 0x004c irms_a irms, element a sqsumi 02 16 )25 u 32 0x0050 vrms_b vrms, element b sqsumv 12 16 )26 u 32 0x0054 irms_b irms, element b sqsumi 12 16 )27 u 32 0x0058 vrms_c (reserved) )28 u 32 0x005c irms_c (reserved) )29 u 32 0x0060 status status of meter see table for status register )2a u 32 0x0064 cai count of accumula- tion intervals since reset, or last clear. count )2b s 32 0x0068 whi** imported wh, all elements. same lsb as w0sum )2c s 64 0x006c whi_a** imported wh, element a ? )2e s 64 0x0074 whi_b** imported wh, element b ? )30 s 64 0x007c whi_c** (reserved) )32 s 64 0x0084 varhi* imported varh, all elements. lsb of w0sum )34 s 64 0x008c varhi_a* imported varh, element a ? )36 s 64 0x0094 varhi_b* imported varh, element b ? )38 s 64 0x009c varhi_c* (reserved) )3a s 64 0x00a4 vah** vah, all elements. lsb of w0sum )3c s 64 0x00ac vah_a** vah, element a ? )3e s 64 0x00b4 vah_b** vah, element b ? )40 s 64 0x00bc vah_c** (reserved) )42 s 64 0x00c4 whe** exported wh, all elements. lsb of w0sum )44 s 64 0x00cc whe_a** exported wh, element a ? )46 s 64 0x00d4 whe_b** exported wh, element b ? )48 s 64 0x00dc whe_c** (reserved) )4a s 64 0x00e4
71m6531 demo board user?s manual page: 38 of 83 ? 2007-2008 teridian semiconductor corporation v1.5 name purpose function or lsb value cli f l in bits x dat a varhe exported varh, all elements. lsb of w0sum )4c s 64 0x00ec varhe_a exported varh, element a ? )4e s 64 0x00f4 varhe_b exported varh, element b ? )50 s 64 0x00fc varhe_c (reserved) )52 s 64 0x0104 whn net metered wh, all elements a, lsb of w0sum )54 s 64 0x010c whn_a net metered wh, element a, for autocalibration lsb of w0sum )56 s 64 0x0114 whn_b net metered wh, element b ? )58 s 64 0x011c whn_c (reserved) )5a s 64 0x0124 varhn net metered varh, all elements lsb of w0sum )5c s 64 0x012c varhn_a net metered varh, element a, for auto- calibration ? )5e s 64 0x0134 varhn_b net metered varh, element b ? )60 s 64 0x013c varhn_c (reserved) )62 s 64 0x0144 mainedgecnt count of voltage zero crossings count )64 u 32 0x014c wh default sum of wh, nonvolatile lsb of w0sum )65 s 64 0x0150 wh_a wh, element a, nonvolatile ? )67 s 64 0x0158 wh_b wh, element b, nonvolatile ? )69 s 64 0x0160 wh_c (reserved) )6b s 64 0x0164 statusnv nonvolatile status see st atus )6d n/a 32 0x0170 table 1-12: mpu memory locations
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 39 of 83 table 1-13 lists the possible entries for the pulsewsource and pulsevsource registers. decimal value in pulsewsource, pulsevsource selected pulse source decimal value in pulsewsource, pulsevsource selected pulse source 0 equ= 0 : w0sum if w0sum > w1sum, w1sum if w1sum > w0sum *** 18 (reserved) 1 w0sum 19 wsum_i 2 w1sum 20 w0sum_i 3 (reserved) 21 w1sum_1 4 varsum 22 (reserved) 5 var0sum 23 varsum_i 6 var1sum 24 var0sum_i 7 (reserved) 25 var1sum_i 8 i0sqsum 26 (reserved) 9 i1sqsum 27 wsum_e 10 (reserved) 28 w0sum_e 11 insqsum 29 w1sum_e 12 v0sqsum 30 (reserved) 13 v1sqsum 31 varsum_e 14 (reserved) 32 var0sum_e 15 vasum 33 var1sum_e 16 va0sum 34 (reserved) 17 va1sum ***changing the equation (equ) in the i/o ram does not alter the co mputations implemented in the demo code. table 1-13: values for pulse source registers
71m6531 demo board user?s manual page: 40 of 83 ? 2007-2008 teridian semiconductor corporation v1.5 table 1-14 explains the bits of the status register. bit significance bit significance 0 creep: all elements are in creep mode. the pulse variables will be ?jammed? with a constant value on every accumulation interval to prevent spurious pulses. therefore, creep mode stops pulsing even in internal pulse mode. 16 battery_bad: the battery voltage is below vbatmin. the battery is checked only once per day, right after midnight. 1 -- 17 -- 2 pb_press: an activation of the pushbutton was recorded at the most rec ent reset or wake from battery mode. 18 cal_bad: this bit is set after reset if the longitudinal checksum over calibration factors is invalid. 3 wake_alarm: an wake timer flag was recorded at the most recent wake from battery mode. 19 clock_unset: this bit is set after reset if is de- termined that the rtc has never been set, in- dicating a bad or non-existent battery. 4 minvb: voltage at element b is below vthrshld. the element is in creep mode. 20 power_bad: this bit is se t after reset if is de- termined that both longitudinal checksums over the two sets of energy billing data are bad. 5 maxva: voltage at element a is above vthrshldp. 21 gndneutral: this bit indicates that a grounded neutral was detected. 6 maxvb: voltage at element b is above vthrshldp. 22 tamper: this bit indicates that a tampering attempt was detected (compilation option, not supported on standard demo board). 7 -- 23 vxedge: copy of the ce main_edge bit. 8 minva: voltage at element a is below vthrshld. the element is in creep mode. 24 -- 9 wd_detect: the most recent reset was caused by the wdt 25 saga: copy of the ce sag_a bit w/ a maximum delay of 8 sample intervals. 10 -- 26 sagb: copy of the ce sag_b bit 11 maxia: the current in element a is above ithrshld 27 -- 12 maxib: the current in element b is above ithrshld 28 f0_ce: a copy of the f0 bit of the ce, with a jitter of up to 8 sample intervals. 13 -- 29 -- 14 mint: the temperature is below the minimum (as defined in option_gbl.h) 30 -- 15 maxt: the temperature is above the maximum (as defined in option_gbl.h) 31 one_sec: this bit changes every accumulation interval. table 1-14: status register
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 41 of 83 mpu accumulation output variables accumulation values are accumulated from xfer cycle to xfer cycle (see table 1-15 ). they are organized as two 32-bit registers. the first register stores the decimal number displayed on the lcd. for example, if the lcd shows ?001.004?, the value in the firs t register is 1004. this register wraps around after the value 999999 is reached. the second register holds fractions of the accumulated energy, with an lsb of 9.4045*10 -13 *vmax*imax*in_8 wh. the mpu accumulation registers always hold positive values. the cli commands with two question marks, e.g. )39?? should be used to read the variables. xram word address name description 0x2c whi total watt hours consumed (imported) 0x44 whe total watt hours generated (exported) 0x34 varhi total var hours consumed 0x4c varhe total var hours generated (inverse consumed) 0x3c vah total va hours 0x2e whi_a total watt hours consumed through element 0 0x46 whe_a total watt hours generated (inverse consumed) through element 0 0x36 varhi_a total var hours consumed through element 0 0x4e varhe_a total var hours generated (inverse consumed) through element 0 0x3e vah_a total va hours in element 0 0x30 whi_b total watt hours consumed through element 1 0x48 whe_b total watt hours generated (inverse consumed) through element 1 0x38 varhi_b total var hours consumed through element 1 0x50 varhe_b total var hours generated (inverse consumed) through element 1 0x40 vah_b total va hours in element 1 table 1-15: mpu accumulation output variables 1.11 emulator operation the signum systems adm51 ice (in-circuit-emulator) can be plugged into j14 (or j15) of the demo board. the following conditions are required for successful emulator operation (including code load/erase in flash memory): 1 ) emulator operation is enabled by plugging a jumper into header jp4, pins v3p3d/ice_e 2 ) the ce is disabled (using serial command ce0 or writing 0x00 to i/o ram cell 0x2000 ) for details on code development and test see the software user?s guide (sug). the emulator can also be operated when the 71m6531d/f is in brownout mode. in brownout mode, the 71m6531d/f er for the pull-up resistors necessa ry for emulator operation via its v3p3d pin. provides pow emulators or other test equipment should never be connected to a live meter without proper isolation! usb isolators are available from v arious vendors (see the printed safety notice shipped with the emulator).
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71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 43 of 83 2 2 appl ication information 2.1 calibration theory a typical meter has phase and gain errors as shown by s , a xi , and a xv in figure 2-1 . following the typical meter convention of current phase being in the lag dire ction, the small amount of phase lead in a typical current sensor is represented as - s . the errors shown in figure 2-1 represent the sum of all gain and phase errors. they include errors in voltage attenuators, current sensors, and in adc gains. in other words, no errors are made in the ?input? or ?meter? boxes. i v l input ? s a xi a xv errors ) cos( l i v i deal = ) cos( s l x v x i a a i v a ctual ? = 1 ? = ? i deal a ctual i deal i deal a ctual e rror w i rms meter v rms x i a i a ctual i i deal = = , x v a v a ctual v i deal = = , l is phase lag s is phase lead figure 2-1: watt meter with gain and phase errors. during the calibration phase, we measure errors and th en introduce correction factors to nullify their effect. with three unknowns to determine, we must make at least three measurements. if we make more measurements, we can average the results. 2.1.1 calibration with three measurements a simple calibration method uses three measurem ents. typically, a voltage measurement and two watt- hour (wh) measurements are made. a voltage displa y can be obtained for test purposes via the command >mr2.1 in the serial interface. let?s say the voltage measurement has the error e v and the two wh measurements have errors e 0 and e 60 , where e 0 is measured with l = 0 and e 60 is measured with l = 60. these values should be simple ratios? not percentage values. they should be zero when the meter is accurate and negative when the meter runs slow. the fundamental frequency is f 0 . t is equal to 1/f s , where f s is the sample frequency (2560.62hz). set all calibration factors to nominal: cal_ia = 16384, cal_va = 16384, phadja = 0.
71m6531 demo board user?s manual from the voltage measurement, we determine that 1. ? 1 += v xv ea we use the other two measurements to determine s and a xi . 2. 1)cos( 1 )0cos( )0cos( 0 ? =? ? = s xixv s xixv aa iv aaiv e 2a. )cos( 1 0 s xixv e aa + = 3. 1 )60cos( )60cos( 1 )60cos( )60cos( 60 ? ? =? ? = s xixv s xixv aa iv aaiv e 3a. [] 1 )60cos( )sin()60sin()cos()60cos( 60 ? + = s s xixv aa e 1)sin()60tan( )cos( ? + = s xixv s xixv aa aa combining 2a and 3a: 4. )tan()60tan()1( 0060 s eee ++= 5. )60tan()1( )tan( 0 060 + ? = e ee s 6. ? ? ? ? ? ? ? ? ? + ? = ? )60tan()1( tan 0 060 1 e ee s and from 2a: 7. ? )cos( 1 0 s xv xi a e a + = now that we know the a xv , a xi , and s errors, we calculate the new calibration voltage gain coefficient from the previous ones: xv new a vcal vcal _ _ = we calculate phadj from s , the desired phase lag: [] [] ? ? ? ? ? ? ??? ? ???+ = ? ? ? ? )2cos()21(1)tan()2sin()21( )2cos()21(2)21(1)tan( 2 0 9 0 9 0 9 29 20 tf tf tf phadj s s page: 44 of 83 ? 2007-2008 teridian semiconductor corporation v1.5
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 45 of 83 and we calculate the new calibration current gain coefficient, including compensation for a slight gain increase in the phase calibration circuit. 29 0 9 0 9 20 20 )21()2cos()21(21 ))2cos()21(2 22( 2 1 1 _ _ ? ? ? ? ? ?+ ?? ?? + + = tf tf phadj phadj a ical ical xi new 2.1.2 calibration with five measurements the five measurement method provides more orthogon ality between the gain and phase error derivations. this method involves measuring e v , e 0 , e 180 , e 60 , and e 300 . again, set all calibration factors to nominal, i.e. cal_ia = 16384, cal_va = 16384, phadja = 0. first, calculate a xv from e v : 1. ? 1 += v xv ea calculate a xi from e 0 and e 180 : 2. 1)cos( 1 )0cos( )0cos( 0 ? =? ? = s xixv s xixv aa iv aaiv e 3. 1)cos( 1 )180cos( )180cos( 180 ? =? ? = s xixv s xixv aa iv aaiv e 4. 2)cos( 2 1800 ? =+ s xixv aaee 5. )cos(2 2 1800 s xixv ee aa ++ = 6. ? )cos( 12)( 1800 s xv xi a ee a ++ = use above results along with e 60 and e 300 to calculate s . 7. 1 )60cos( )60cos( 60 ? ? = iv aaiv e s xixv 1)sin()60tan( )cos( ? + = s xixv s xixv aa aa 8. 1 )60cos( )60cos( 300 ? ? ?? = iv aaiv e s xixv 1)sin()60tan( )cos( ? ? = s xixv s xixv aa aa subtract 8 from 7 9. )sin()60tan( 2 300 60 s xixv aaee =? use equation 5: 10. )sin()60tan( )cos( 2 1800 300 60 s s ee ee ++ =?
71m6531 demo board user?s manual 11. )tan()60tan()2 ( 1800 300 60 s eeee ++=? 12. ? ? ? ? ? ? ? ? ? ++ ? = ? )2 )(60tan( )( tan 1800 300 60 1 ee ee s now that we know the a xv , a xi , and s errors, we calculate the new calibration voltage gain coefficient from the previous ones: xv new a vcal vcal _ _ = we calculate phadj from s , the desired phase lag: [] [] ? ? ? ? ? ? ??? ? ???+ = ? ? ? ? )2cos()21(1)tan()2sin()21( )2cos()21(2)21(1)tan( 2 0 9 0 9 0 9 29 20 tf tf tf phadj s s and we calculate the new calibration current gain coefficient, including compensation for a slight gain increase in the phase calibration circuit. 29 0 9 0 9 20 20 )21()2cos()21(21 ))2cos()21(2 22( 2 1 1 _ _ ? ? ? ? ? ?+ ?? ?? + + = tf tf phadj phadj a ical ical xi new 2.1.3 fast calibration the calibration methods described so far require that the calibration system sequentially applies currents at various phase angles. a simpler approach is based on th e calibration system applying a constant voltage and current at exactly zero degrees phase angle. this approach also requires much simpler mathematical operations. before starting the calibration proc ess, the voltage and current calibration factors are set to unity (16384) and the phase compensation factors are set to zero. during the calibration process, the meter measures for a given constant time, usually 30 seconds, and is then examined for its accumulated wh and varh energy values. access to the internal accumulation registers is necessary for this method of calibra tion. the phase angle introduced by the voltage and/or current sensors is then simply determined by: wh varh a tan = ? cal_va is determined by comparing the applied voltage to the measured voltage, or: measured applied v v vacal ?= 16384 _ page: 46 of 83 ? 2007-2008 teridian semiconductor corporation v1.5
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 47 of 83 cal_ia is determined by comparing applied real e nergy with the measured apparent energy (and compensating for the change applied to cal_va ): ? ? ? = vacal vah wh iacal measured applied _ 16384 _ the derivation of these formul ae is shown in the appendix. 2.2 calibration procedures 2.2.1 general precautions calibration requires that a calibration system is us ed, i.e. equipment that app lies accurate voltage, load current and load angle to the unit being calibrated, while measuring the response from the unit being calibrated in a repeatable way. by repeatable we mean th at the calibration system is synchronized to the meter being calibrated. best results are achieved when the first pulse from the meter opens the measurement window of the calibrat ion system. this mode of operation is opposed to a calibrator that opens the measurement window at random time and that therefore may or may not catch certain pulses emitted by the meter. note: it is essential for a valid meter calibration to have the volt age stabilized a few seconds before the current is applied. this enables the demo code to initialize the 71m6531d/f and to stabilize the plls and filters in the ce. this method of operation is consistent with meter applications in the field as well as with metering standards. each meter phase must be calibrated individually. the procedures below show how to calibrate a meter phase with either three or five measurements. the phadj equations apply only when a current transformer is used for the phase in question. note that positiv e load angles correspond to lagging current (see figure 2-2 ). voltage figure 2-2: phase angle definitions the calibration procedures described below should be followed after interfacing the voltage and current sensors to the 71m6531d/f chip. when properly interfaced, the v3p3 power supply is connected to the meter neutral and is the dc reference for each input. each voltage and current waveform, as seen by the 71m6531d/f, is scaled to be less than 250mv (peak). current +60 using energy generating energy current lags voltage (inductive ) current leads voltage (capacitive ) -60 positive direction voltage
71m6531 demo board user?s manual page: 48 of 83 ? 2007-2008 teridian semiconductor corporation v1.5 2.2.2 calibration procedure with three measurements the calibration procedure is as follows: 1. al l calibration factors are re set to their default values, i.e. cal_ia = cal_va = 16384, and phadj_a = 0. 2. an rms voltage v ideal consistent with the meter?s nominal voltage is applied, and the rms reading v actual of the meter is recorded. the voltag e reading error axv is determined as axv = (v actual - v ideal ) / v ideal 3. ap ply the nominal load current at phase angles 0 and 60, measure the wh energy and record the errors e 0 and e 60 . 4. calculate the new calibration fa ctors cal_ia, cal_va, and phadj_a, using the formulae presented in section 2.1.1 or using the spreadsheet presented in section 2.2.4 . 5. apply the new calibration factors cal_ia, cal_va, and phadj_a to the mete r. the memory locations for these factors are given in section 1.9.1 . 6. test the meter at nominal current and, if des ired, at lower and higher currents and various phase angles to confirm the desired accuracy. 7. store the new calibration fact ors cal_ia, cal_va, and phadj_a in the eeprom of the meter. if a demo board is calibrated, the methods shown in section 1.9.2 can be used. 2.2.3 calibration procedure with five measurements the calibration procedure is as follows: 1) all calibration factors are reset to their defaul t values, i.e. cal_ia = cal_va = 16384, and phadj_a = 0. 2) an rms voltage v ideal consistent with the meter?s nominal voltage is applied, and the rms reading v actual of the meter is recorded. the voltag e reading error axv is determined as axv = (v actual - v ideal ) / v ideal 3) apply the nominal load current at phase angles 0, 60, 180 and ?60 (-300). measure the wh energy each time and record the errors e 0 , e 60 , e 180 , and e 300 . 4) calculate the new calibration factors cal_ia, ca l_va, and phadj_a, using the formulae presented in section 2.1.2 or using the spreadsheet presented in section 2.2.4 . 5) apply the new calibration factors cal_ia, cal_va, and phadj_a to the mete r. the memory locations for these factors are given in section 1.9.1 . 6) test the meter at nominal current and, if des ired, at lower and higher currents and various phase angles to confirm the desired accuracy. 7) store the new calibration factors cal_ia, cal_va, and phadj_a in the eeprom of the meter. if the calibration is performed on a teridian de mo board, the methods shown in sections 1.9.2 can be used.
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 49 of 83 2.2.4 procedure for auto-calibration the fast calibration procedure is supported by the demo code when the auto-cal function is executed. this procedure requires the following steps: 1) establish load voltage and current from the ca libration system. the load angle must be exactly 0.00 degrees. 2) enter the expected voltage and current using cli commands. for example, to calibrate for 240v, 30a for two seconds, enter )f=2=+2400=+300. 3) issue the cli command clb . 4) wa it the specifi ed number of seconds. 5) check the calibration factors est ablished by the autom atic procedure. 2.2.5 calibration spreadsheets calibration spreadsheets are availabl e from teridian semiconductor. they are also included in the cd- rom shipped with any demo kit. figure 2-3 shows the spreadsheet for three measurements with three phases in use (only one phase needs to be used for the 71m6531d/f chip). figure 2-3 shows the spreadsheet for five measurements wi th three phases (only one phase needs to be used for the 71m6531d/f chip). 71m6511/71m6513/71m6515 calibration worksheet enter values in yellow fields rev 4.7 results will show in green fields? date: 11/18/2005 ac frequency: 50 [hz] (click on yellow field to select from pull-down list) phase a %fraction old new energy reading at 0 -3.846 -0.03846 cal_ia 16384 16756 energy reading at +60 -3.642 -0.03642 cal_va 16384 16659 voltage error at 0 -1.65 -0.0165 phadj_ a 220 expected voltage 240 [v] measured voltage 236.04 [v] phase b %fraction old new energy reading at 0 10 0.1 cal_ib 16384 16384 energy reading at +60 10 0.1 cal_vb 16384 14895 voltage error at 0 10 0.1 phadj_b 0 expected voltage 240 [v] measured voltage 264 [v] phase c %fraction old new energy reading at 0 -3.8 -0.038 cal_ic 16384 16409 energy reading at +60 -9 -0.09 cal_vc 16384 17031 voltage error at 0 -3.8 -0.038 phadj_c -5597 readings: enter 0 if the error is 0%, expected voltage 240 [v] enter -3 if meter runs 3% slow. measured voltage 230.88 [v] three measurements voltage figure 2-3: calibration spreadsheet for three measurements current +60 using energy generating energy current lags voltage (inductive ) current leads voltage (capacitive ) -60 positive direction voltage
71m6531 demo board user?s manual 71m6511/71m6513/71m6515 calibration worksheet five measurements pi rev 4.7 ts date: 10/25/2005 ac frequency: 60 [hz] (click on yellow field to select from pull-down list) phase a %fraction old new energy reading at 0 0 0 cal_ia 16384 16384 energy reading at +60 0 0 cal_va 16384 16384 energy reading at -60 0 0 phadj_a 0 energy reading at 180 0 0 voltage error at 0 0 0 expected voltage [v] 240 240 measured voltage [v] phase b %fraction old new energy reading at 0 0 0 cal_ib 16384 16384 energy reading at +60 0 0 cal_vb 16384 16384 energy reading at -60 0 0 phadj_b 0 energy reading at 180 0 0 voltage error at 0 0 0 expected voltage [v] 240 240 measured voltage [v] phase c %fraction old new energy reading at 0 0 0 cal_ic 16384 16384 energy reading at +60 0 0 cal_vc 16384 16384 energy reading at -60 0 0 phadj_c 0 readings: enter 0 if the error is 0%, energy reading at 180 0 0 enter +5 if meter runs 5% fast, voltage error at 0 0 0 enter -3 if meter runs 3% slow. expected voltage [v] 240 240 measured voltage [v] results will show in green fields? enter values in yellow fields! voltage page: 50 of 83 ? 2007-2008 teridian semiconductor corporation v1.5 figure 2-4: calibration spreadsheet for five measurements figure 2-5: calibration spreadsheet for fast calibration current +60 using energy generating energy current lags voltage (inductive ) current leads voltage (capacitive ) -60 positive direction voltage 6521 fast calibration work sheet rev 4.8 procedure: sum_cycles 60 current [a] 0.408 fs 2520.6154 1. turn on excitation. load angle must be exactly 0.00 degrees pre_sum 42 voltage [v] 223.4 wh_a lsb 8.3556e-08 2. ce1 -- enable ce, wait 2 seconds vmax 600 f [hz] 60 vrms lsb 4.49525e-07 3. )1=2 -- clear accumulators, wait 30 seconds imax_a 208 ce lsb 6.6952e-13 4. ce0 -- disable ce imax_b 208 wh_b lsb 8.3556e-08 5. )2e? -- number of accumulation intervals, enter in spreadsheet 6. )14? -- get vrms value, enter in spreadsheet cai -- )28 31 phase a 7. )39???????? )43???????? -- enter accumulated values in spreadsheet 31 phase b 8. ]54? -- get temp_raw_x from ce, write to temp_nom if not starting w/ fresh calibration factors, enter value of current factors vrms -- )23 vrms a in column "old". digital 496461520 vrms 223.17 old new )54 )55 total wh 0.8414 )5a )5b cal_va 16384 16401 ]9 0 10070303 expected wh 0.7847 0 84156 angle cal_ia 16384 15263 ]8 total varh 0.0070 0.4788 phadj_a 0 -1312 ]c angle 0 0.47869219 cal_ib 16384 16170 ]a )56 )57 total wh 0.7942 )47 )48 phadj_b 0 -1973 ]d 0 9504914 expected wh 0.7847 0 119446 angle angle 0 0.72010832 total varh 0.0100 0.7200 enter values in yellow fields! phase b varh phase a net wh phase b net wh constants meter phase a net varh results will show in green fields. inputs
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 51 of 83 2.2.6 compensating for non-linearities nonlinearity is most noticeable at low currents, as shown in figure 2-6 , and can result from input noise and truncation. nonlinearities can be eliminated using the quant variable. 0 2 4 6 8 10 12 0.1 1 10 100 i [a] error [%] error figure 2-6: non-linearity caused by quantification noise the error can be seen as the presence of a virtual c onstant noise current. while 10ma hardly contribute any error at currents of 10a and above, the no ise becomes dominant at small currents. the value to be used for quant can be determined by the following formula: lsbimax vmax iv error quant ?? ? ?= 100 where error = observed error at a given voltage (v) and current (i), vmax = voltage scaling factor, as described in section 1.8.3 , imax = current scaling factor, as described in section 1.8.3 , lsb = quant lsb value = 7.4162*10 -10 w example: assuming an observed error as in figure 2-6 , we determine the error at 1a to be +1%. if vmax is 600v and imax = 208a, and if the measurement was taken at 240v, we determine quant as follows: 11339 104162.7208600 1240 100 1 10 ?= ??? ? ?= ? quant quant is to be written to the ce location 0x2f. it does not matter which current value is chosen as long as the corresponding error value is significant (5% error at 0.2a used in the above equation will produce the same result for quant ). input noise and truncation can cause similar errors in the var calculation that c an be eliminated using the quant_var variable. quant_var is determined using the same formula as quant . 2.2.7 calibrating meters with comb ined ct and shunt resistor in many cases it is desirable to discourage tamperi ng by using two current sensors. the simple tampering method that involves connecting the low side of the lo ad to earth ground (neutral) can be detected by adding a second current sensor in the neutral path, as shown in figure 2-7 . in this configuration, the shunt re sistor is connected to the ia chan nel while the current transformer is connected to the ib chan nel of the 71m6531d/f.
71m6531 demo board user?s manual calibrating this arrangement requires a few extra steps above the regular calibration. the calibration procedure applies to the sensor arrangement described above (shunt = ia, ct = ib). preparation: 1. set the meter equation field of the configuration ram for equ to zero usin g the command: ri00 = 10 (i.e. equ = 0; ce_en =1; tmux = 0) 2. for the sake of calculation, individual wrate parameters for pulse generation, i.e. wrate_shunt and wrate_ct will be used. 3. it is also necessary to compute and estimate imax_shunt and imax_ct parameters for meter billing purposes. 4. using imax_shunt and vmax , the energy calculations for channel a should be performed. 5. the energy calculations for channel b should be performed using imax_ct and vmax . 6. the lsb values for measurements for w0sum , w1sum , var0sum , var1sum, i0sqsum , i1sqsum , v0sqsum should be modified to compute t he correct energy values. that is, imax_shunt and imax_ct should be applied separately to individual channels based on the sensor connections. 7. before starting a calibration, all calibration factors must be in their default state, i.e. cal_ia (0x10), cal_va (0x11), cal_ib (0x12) must be 16384. phadj_ a (0x18) and phadj_b (0x19) should be zero. ia va ib load live neut ct shunt v3p3 71m6511 71m6531 figure 2-7: 71m6531 with shunt and ct page: 52 of 83 ? 2007-2008 teridian semiconductor corporation v1.5
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 53 of 83 calibrating for shunt resistor (channel a): 1. calculate imax for the shunt resistor ( imax_shunt ). this can be done by using the following formula: imax_shunt = vi max /r sh the vi max value is the maximum analog input voltage fo r the channel, typically 176.8mv (rms), and r sh is the resistance value of the shunt resistor. the value obtained for imax_shunt is stored at the mpu address 0x0a, using the command )a= imax_shunt of the demo code supplied by teridian. 2. compute wrate_shunt based on imax_shunt and vmax and the formula given in 1.8.3 : wrate_shunt = ( imax_shunt * vmax * 47.1132) / (kh * in_8 * n acc * x) use vmax = 600v (rms) for the 6531 demo board if the resistor divider for va has not been changed. 3. update the wrate register (at ce address 0x2d) with wrate_shunt , using the command ]21= wrate_shunt. 4. test for accuracy at 15a, 240v at phase an gle 0, phase angle 60 and at phase angle ?60. 5. apply the error values to the calibration spreadsheet (revision 2.0 or later) and determine the calibration factors for channel a, i.e. cal_ia , cal_va, and phadj_a . 6. update the ce registers 0x08, 0x09 and 0x0e of the compute engine with the calibration factors obtained from the spreadsheet, using the commands ]10= cal_ia , ]11= calva , and ]18= phadj_a . 7. retest for accuracy at several currents and phase angles. at this point, channel a is calibrated. wsum will be based on the voltage applied to the meter and the current flowing through the shunt resistor. the pulse s generated will be based on the parameters entered for channel a. calibration for ct (channel b): 1. compute imax for the ct channel ( imax_ct ), based on the ct turns ratio n and the termination resistor value r t using the formula: imax_ct = 176.8mv* n / r t this value is used in the following step as imax_ct . 2. compute wrate_ct based on the values obtained for imax_ct and the formula given in 1.8.3 : wrate_ct = ( imax_ct * vmax * 47.1132) / (kh * in_8 * n acc * x) 3. update the wrate register (ce address 0x2d) with wrate_ct , using the command ]21= wrate_ct. 4. enter the command >)7=2 . configure w1sum as external pulse source since the ct is connected to channel 1 for va*ib. 5. test for accuracy at 15a, 240v at phase an gle 0, phase angle 60 and at phase angle ?60. 6. apply these values to the calibration spread s heet (revision 2.0 or later) and derive the calibration factor phadj_b . 7. update only the ce address 0x0f with the value for phadj_b using the command ]19= phadj_b . 8. adjust cal_ib for the total error found in the accuracy test using the formula cal_ib = 16384 * (1 - error/100)
71m6531 demo board user?s manual page: 54 of 83 ? 2007-2008 teridian semiconductor corporation v1.5 that is, if the chip reports an error of -2.5%, cal_ib should be adjusted to a value of (16384 * (1 - (-2.5/100)). 9. since cal_va and cal_ia have already been adjusted for channel a, these registers should not be updated. 10. retest for accuracy at several currents and phase angles. after completing the calibration, the energy values w0sum, based on va*ia and w1sum , based on va*ib are accessible to the mpu firmware. the pulse rate is controlled by w1sum and determined by the parameters selected for the ct channel (va, ib). differences between w0sum and w1sum , indicating tampering, can be detected by the mpu for each accumulation interval. note: the user has to customize the demo code to utilize the values obtained from the va, ia, and ib channels for proper calculation of tariffs. table 2-1 summarizes the important parameters used in the calibration procedure. channel sensor formula parameters w pulse generation var pulse generation a shunt resistor wasum = va*ia varasum = va*ia vmax = vmax imax = imax_shunt wrate = wrate_shunt wasum varasum b ct wbsum = va*ib varbsum = va*ib vmax = vmax imax = imax_ct wrate = wrate_ct wbsum varbsum table 2-1: calibration summary 2.3 c alibrating and compensating the rtc the real-time clock (rtc) of the 71m6534 is controlled by the crystal oscillator and thus only as accurate as the oscillator. the 71m6534 has two rate adjustment mechanisms: ? analog rate adjustment, using the i/o ram register rtca_adj[6:0]. this adjustment is used to set the oscillator frequency at room temperature close to the tar get (ideal) value. adjusting rtca_adj[6:0] will change the time base used for ener gy measurements and thus slightly influence these energy measurements. therefor e it is recommended to adjust the rtc before calibrating a meter. ? digi tal rate adjustment is used to dynamically co rrect the oscillator rate under mpu control. this is necessary when the ic is at te mperatures other than room tem perature to correct for frequency deviations. the analog rate adjustment uses the i/o ram register rtca_adj[6:0] , which trims the crystal load capaci- tance. setting rtca_adj[6:0] to 00 minimizes the load capacitance, maximizing the oscillator frequency. setting rtca_adj[6:0] to 3f maximizes the load capacitance, minimizing the oscillator frequency. the maximum adjustment is approximately 60ppm. the precise amount of adjustment will depend on the crystal and on the pcb properties. the adjustment may occur at any time, and the resulting clock frequency can be measured over a one-second interval using a frequency counter connected to the tmuxout pin, while 0x10 or 0x11 is selected for the i/o ram register tmux [4:0]. selecting 0x10 will generate a 1-second output; selecting 0x11 will generate a 4-second output. t he 4-second output is useful to adjust the oscillator at high accuracy. it is also possible to set tmux [4:0] to 0x1d to generate a 32.768khz output. the adjustment of the o scillator frequency using rtca_adj[6:0] at room temperature will cause the 71m6534 ic to maintain the adjusted frequency the digital rate adjustment can be used to adjust the clock rate up to 988ppm, with a resolution of 3.8ppm. the clock rate is adjusted by writing the appropriate values to preg[16:0] and qreg[1:0] . the default frequency is 32,768 rtclk cycles per second. to shift the clock frequency by ppm, calculate preg and qreg using the following equation:
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 55 of 83 ? ? ? ? ? ? + ?+ ? =+? ? 5.0 101 832768 4 6 floor qreg preg preg and qreg form a single adjustment register with qreg providing the two lsbs. the default values of preg and qreg , corresponding to zero adjustment, are 0x 10000 and 0x0, respectively. setting both preg and qreg to zero is illegal and disturbs the function of the rtc. if the crystal temperature coefficient is known, the mp u can integrate temperature and correct the rtc time as necessary, using preg[16:0] and qreg[1:0] . the demo code adjusts the oscillator clock frequency using the parameters y_cal , y_cal1 and y_cal2 , which can be obtained by characterizing the crysta l over temperature. prov ided the ic substrate temperature tracks the crystal temperat ure, the demo code adjusts the oscillator within very narrow limits. the mpu demo code supplied with the teridian demo kits has a direct interface for these coefficients and it directly controls the preg[16:0] and qreg[1:0] registers. the demo code uses the coefficients in the following form: 1000 2_ 100 _ 10 _ )( 2 calcy t calcy t caly ppm correction ?+ ?+ = note that the coefficients are scaled by 10, 100, and 1000 to provide more resolution. example: for a crystal, the deviations from nominal fr equency are curve fitted to yield the coefficients a = 10.89, b = 0.122, and c = ?0.00714. the coefficients for the demo code then become (after rounding, since the demo code accepts only integers): y_cal = -109, y_calc = 12, y_calc2 = 7 2.4 testing the demo board this section will explain how the 71m6531d/f ic and t he peripherals can be tested. hints given in this section will help evaluating the features of the demo board and understanding the ic and its peripherals. 2.4.1 functional meter test this is the test that every demo board has to pass before being integrated into a demo kit. before going into the functional meter test, the demo board has al ready passed a series of bench-top tests, but the functional meter test is the first test that applies r ealistic high voltages (and current signals from current transformers) to the demo board. figure 2-8 shows a meter connected to a typical calibration system. the calibrator supplies calibrated voltage and current signals to the meter. it should be no ted that the current flows th rough the ct or cts that are not part of the demo board. the demo board rather receives the voltage output signals from the ct. an optical pickup senses the pulses emitted by the meter and reports them to the cali brator (some calibration systems have electrical pickups). the calibrator meas ures the time between the pulses and compares it to the expected time, based on the meter kh and the applied power.
71m6531 demo board user?s manual calibrator ac voltage current ct meter under test optical pickup for pulses calibrated outputs pulse counter pc figure 2-8: meter with calibration system teridian demo boards are not calibrated prior to shipping. however, the demo board pulse outputs are tested and compared to the expected pulse output. figure 2-9 shows the screen on the controlling pc for a typical demo board. the number in the red field under ?as found? represents the error measured for phase a, while the number in the red field under ?as le ft? represents the error measured for phase b. both numbers are given in percent. this means that for the measured demo board, the sum of all errors resulting from tolerances of pcb components, cts, and 71m6531 d/f tolerances was ?2.8% and ?3.8%, a range that can easily be compensated by calibration. figure 2-9: calibration system screen 2.4.2 eeprom testing the eeprom provided on the demo board is straightforward and can be done using the serial command line interface (cli) of the demo code. page: 56 of 83 ? 2007-2008 teridian semiconductor corporation v1.5
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 57 of 83 to write a string of text characters to the eeprom and read it back, we apply the following sequence of cli commands: >eec1 enables the eeprom >eesthis is a test writes text to the buffer >eet80 writes buffer to address 80 written to eeprom address 00000080 74 68 69 73 20 69 73 20 61 ?. response from demo code >eer80.e reads text from the buffer read from eeprom address 00000080 74 68 69 73 20 69 73 20 61 ?. response from demo code >eec0 disables the eeprom 2.4.3 rtc testing the rtc inside the 71m6531d/f ic is straightforward and can be done using the serial command line interface (cli) of the demo code. to set the rtc and check the time and date, we apply the following sequence of cli commands: >m10 lcd display to show calendar date >rtd05.09.27.3 sets the date to 9/27/2005 (tuesday) >m9 lcd display to sh ow time of day >rtt10.45.00 sets the time to 10:45:00. am/p m distinction: 1:22:33pm = 13:22:33 2.4.4 hardware watchdog timer the hardware wdt of the 71m6534/6534h is disabled when the voltage at the v1 pin is at 3.3v (v3p3). on the demo boards, this is done by plugging in a jumper at tp10 between the v1 and v3p3 pins. conversely, removing the jumper at tp10 will enable the wdt. when the wdt is enabled, typing ?w? at the command line interface will cause the demo board to reset. 2.4.5 lcd various tests of the lcd interface can be performed with the demo board, using the serial command line interface (cli): the display outputs are enabled by setting the lcd_en register to 1. register name address [bits] r/w description lcd_en 2021[5] r/w enables the lcd display. when disabled, vlc2, vlc1, and vlc0 are ground as are the com and seg outputs. to access the lcd_en register, we apply the following cli commands: >ri21$ reads the hex value of register 0x2021 >25 response from demo code indicating the bit 5 is set >ri21=5 writes the hex value 0x05 to register 0x 2021 causing the display to be switched off >ri21=25 sets the lcd_en register back to normal the lcd_clk register determines the frequency at which t he com pins change states. a slower clock means lower power consumption, but if the clock is to o slow, visible flicker can occur. the default clock frequency for the 71m6531 demo boards is 150hz ( lcd_clk = 01).
71m6531 demo board user?s manual page: 58 of 83 ? 2007-2008 teridian semiconductor corporation v1.5 register name address [bits] r/w description lcd_clk[1:0] 2021[1:0] r/w sets the lcd clock frequ ency, i.e. the frequency at which seg and com pins change states. note: f w = ckadc/128 = 38,400 00: f w /2 9 , 01: f w /2 8 , 10: f w /2 7 , 11: f w /2 6 to change the lcd clock frequency, we apply the following cli commands: >ri21$ reads the hex value of register 0x2021 >25 response from demo code indicating the bit 0 is set and bit 1 is cleared. >ri21=24 writes the hex value 0x24 to register 0x2021 clearing bit 0 ? lcd flicker is visible now >ri21=25 writes the original value back to lcd_clk 2.4.6 supply current measurements some precautions have to be taken when exact su pply current measurements are to be made. supplying unnecessary pull-up resistors and/or external compo nents with current will yield inaccurate measurement results. in brownout mode, the following precautions should be taken: 1) the debug board should be removed from the demo board. 2) the rx pin should be properly te rminated, e.g. by tying it to g nd. on the demo boards, this is accomplished with r90. 3) the jumper on jp4 should be moved to position 1- 2 in order to save the current required to supply the ice_e pin. 2.5 teridian application notes please contact your local teridian sales repr esentative for teridian application notes.
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 59 of 83 3 hardware description 3.1 demo board description: jumpers, switches, test points and connectors this description covers the d6531n12a2 demo board. the items described in the following tables refer to the flags in figure 3-1 . item # (figure 3.1) schematic & silk screen reference name use 1 j4 va_in this is the line voltage input that feeds both the resistor divider leading to the va pin on the chip and the internal power supply. the line voltage wire is connected to the spade terminal on the bottom of the board.. caution: high voltage. do not touch this pin! 2 tp3 -- 1-pin header allowing access to the v3p3 voltage generated by the board power supply. 3 jp1 ps_sel power source selector. if a jumper is installed, the demo board is powered by the line voltage on phase a. 4 tp15 gnd test point for board ground 5 tp2 va, refa 2-pin header test point. pin 1 is the va line voltage input to the ic, pin 2 is v3p3. 6 jp14 ypulse 2-pin header used as a selector for the driving source of pulse led d6. in default setting (2-3), the wpulse (dio6) drives the led. the alternative selection causes the xpulse output to drive the led. starting with demo code revision 4p6 , the ce will activate the ypulse when a sag condition is encountered. placing a jumper across pins 2 and 3 will activate the varh led when a sag condition is detected which can hel p with sag threshold testing. 7 jp13 xpulse 2-pin header used as a selector for the driving source of led d5. in default setting (1-2), the varpulse (dio7) drives the led. the alternative selection causes the ypulse output to drive the led. 3 table 3-1: 71m6531 demo board description: 1/3
71m6531 demo board user?s manual page: 60 of 83 ? 2007-2008 teridian semiconductor corporation v1.5 item # (figure 3.1) schematic & silk screen reference name use 8 jp12 bat_mode this 3-pin header allows selection of the battery mode operation: a jumper across pins 1-2 indicates that no external battery is available. the 71m6531d/f will stay in brownout mode when system power is down and it will communicate at 9600bd. a jumper across pins 2-3 indicates that an external battery is available. the 71m6531d/f will be abl e to transition from brownout mode to sleep and lcd modes when system power is down and it will communicate at 300bd. 9 j12 v3p3, otx, v3p3, orx, gnd 5-pin header. pins 1 and 3 carry the supply voltage to the 6531d/f ic. pin 2 is the tx_opt output of the 6531d/f ic. pin 4 is the opt_rx input to the 6531d/f ic. pin 5 is ground. 10 d6 varh varh led 11 tp22 varh test points for pulses generated by the varh led. 12 tp21 wh test points for pulses generated by the wh led. 13 d5 wh wh led. 14 jp8 gnd, vbat 3-pin header for connection of an external battery (+ at pin 2, - at pin 3). if no battery is connected, a jumper must be installed across pins 1-2. 15 sw1 reset chip reset switch: the reset pin has an internal pull-down that allows normal chip operation. when the switch is pressed, the reset pin is pulled high which rese ts the ic into a known state. note: the reset button is disable d in the demo board default configuration. the reset butto n can be enabled by removing r91. 16 jp4 ice enable selector for ice/regular operation: jumper 1-2 = regular operation (default) jumper 2-3 = ice operation remove this jumper for brownout current measurements! 17 u5 -- the 71m6531d/f ic (qfn-68) 18 u7 -- lcd 19 tp17 tmuxout 2-pin header providing test points for tmuxout and cktest. 20 j17 spi interface this 2x5 header provides access to the spi interface. 21 j2 debug connector for plugging in the debug board, either directly or via a flat ribbon cable. 22 j15 -- an emulator or flash programmer can be connected to this 6-pin header. for production units, this would be a more economical alternative to j14. 23 sw2 pb pushbutton used to wake up the chip when in sleep or lcd mode. this button can also be used in mission mode to cycle the display. 24 j14 emulator i/f 2x10 male header with 0.05? pitch on the back side of the board. the connector of the signum adm51 emulator or tfp-2 programmer can be plugged into j14. alternatively, j15 can be used. 25 tp10 v1, v3p3 2-pin header representing the v1 comparator voltage input test point and ground. a jumper should be placed between v1 and v3p3 to disable the watchdog timer. table 3-2: 71m6531 demo board description: 2/3
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 61 of 83 item # (figure 3.1) schematic & silk screen reference name use 26 tp1 ia, v3p3 2-pin header test point. pin 1 is the ia input to the ic and pin 2 is v3p3. 27 tp19 ib, v3p3 2-pin test point. pin 1 is the ib input to the ic and pin 2 is the v3p3 reference. 28 j3 ia_in 3-pin header on the bottom of the board for connection of the ct for phase a. pin 3 may be used to ground an optional cable shield. in shunt configuration, two wires from the shunt resistor representing the voltage across the shunt are connected to pins 1 and 2. 29 j16 ib_in 3-pin header on the bottom of the board for connection of the ct for phase b. pin 3 may be used to ground an optional cable shield. 30 tp4 vb, refb 2-pin header test point. pin 1 is the vb line voltage input to the ic, pin 2 is v3p3. 31 j5 vb_in this is the line voltage input that feeds both the resistor divider leading to the vb pin on the chip. the line voltage wire is connected to the spade terminal on the bottom of the board. caution: high voltage. do not touch this pin! 32 j1 5vdc plug for connection of the external 5 vdc power supply. 33 j9 neutral this is the neutral line voltage input. it is connected to the 3.3v net of the 71m6531d/f. the neutral wire is connected to the spade terminal on the bottom of the board. table 3-3: 71m6531 demo board description: 3/3
71m6531 demo board user?s manual 1 5 7 8 10 11 12 13 14 15 16 26 24 22 23 20 25 21 9 4 6 3 2 29 17 18 19 30 32 28 31 27 33 figure 3-1: 71m6531n12a2 board connectors, jumpers, switches, and test points page: 62 of 83 ? 2007-2008 teridian semiconductor corporation v1.5
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 63 of 83 3.2 demo board hardware specifications pcb dimensions dimensions 3.625? x 3.625? (92.075mm x 92.075mm) thickness 0.062? (1.6mm) height w/ components 2.0? (51mm) environmental operating temperature -40?+85c (accuracy of crystal oscillator affected outside ?10c to +60c) storage temperature -40c?+100c power supply using ac input signal 180v?700v rms dc input voltage (powered from dc supply) 5vdc 0.5v supply current 25ma typical input signal range ac voltage signal (va) 0?240v rms ac current signals (ia, ib) from sensor 0?0.25v p/p interface connectors dc supply jack (j1) to wall transformer concentric connector, 2.5mm emulator (j14) 10x2 header, 0.05? pitch emulator (j15) 5x1 header, 0.1? pitch spi 5x2 header, 0.1? pitch input signals spade terminals and 0.1? headers on pcb bottom debug board (j2) 8x2 header, 0.1? pitch target chip (u8) qfn68 functional specification time base frequency 32.768khz, 20ppm at 25c controls and displays reset button (sw2) numeric display 8-digit lcd, 14-segments, 7mm character height ?watts?, ?vars? red leds (d5, d6) measurement range voltage 120?700 v rms (resistor division ratio 1:3,398) current ct: 1.7 termination for 2,000:1 ct (imax=208a), shunt: depending on shunt resistance r s imax = 176mv/r s regulatory compliance rohs pcb, components, and processing are in compliance with the rohs guidelines.
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71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 65 of 83 4 4 appendix this appendix includes the following documentation, tables and drawings: demo board schematics demo board bills of mate rials (parts lists - bom) demo board pcb layout views debug board description debug board electrical schematic debug board bill of materials debug board pcb layout 71m6531d/f pin-out and mechanical description 71m6531d/f pin description 71m6531d/f pin-out modification history
71m6531 demo board user?s manual page: 66 of 83 ? 2007-2008 teridian semiconductor corporation v1.5 4.1 71m6531n12a2 demo board el ectrical schematic figure 4-1: 71m6531n12a2 demo board (rev 2.0): electrical schematic 1/3 ? shunt configuration r34 nc tantalum v3p3 c10 1000pf r5 100 2w gnd v3p3 c37 0.1uf c27 0.1uf 1 2 tp1 ia gnd gnd c17 0.1uf v2p5 gnd ib star connection at u5-50 r86 20.0k, 1% c33 100pf 1 2 tp10 v1 r83 16.9k 1% vb gnd gnd y1 32.768khz vb_in 1 tp3 va rv2 varistor xout 1 2 d3 1n4736a c6 0.47uf, 1000vdc 6.8v 1w r118 100, 2w r6 100, 2w c32 0.03uf, 250vdc 1 2 jp1 ps_sel[0] rv1 varistor live 1 j4 va_in d4 1n4148 power supply selection table 1 2 3 j1 rapc712 gnd c5 0.1uf l9 nc * + c1 2200uf, 16v * +5vdc ext supply r9 68.1 r4 25.5k r7 130 r2 8.06k * = 1206 package 6 1 8 u2 tl431 v3p3 gnd avx ve24m00511k gnd l8 600 ohm ia_in gnd ia neutral r8 1.5 1 2 tp19 ia voltage connections xin c24 15pf c25 33pf tantalum . r20 5k r89 0 tp15 tp vb selection o-board supply external dc supply (j1) ps_sel[0] (jp1) in out refa c11 1000pf 2 1 d8 3301d r18 698, 1% r16 274k, 1% r17 270k, 1% r15 2m, 1%, 1w c9 1000pf r32 750, 1% va l12 nc 1 j9 neutral r22 698 1% r23 270k 1% r26 274k 1% r27 2m 1% 1w r33 750 1% + c22 10uf, 6.3v c12 1000pf c13 1000pf gnd 1 2 tp4 vb l3 600 ohm c14 1000pf ia_in ' r24 10k * = 1206 package * only one shunt can be used at a time. r24 = 10kohm and r25 = nc when using current shunt for channel a. r24 = r25 = 3.4ohm when using ct for channel a. * r14 750 1% c8 1000pf ia_in l7 600 ohm l6 600 ohm 1 2 3 j3 c16 220pf r25 nc current connections c15 220pf 1 j5 vb_in 1 2 tp2 va title size document number rev date: sheet of d6531n12a2 a2 71m6531 demo board schematic 68 pin package 4w, 2ph teridian semiconductor corp. b 12 friday, december 14, 2007 l2 600 ohm neutral v2p5 50 gnda 52 v3p3a 53 va 54 vb 55 ib 56 ia 57 vref 58 v1 59 xin 62 xout 64 slug 69 u8a 6531-68qfn v3p3 gnd r88 0 gnd tantalum ia c21 1000pf l5 600 ohm r107 3.4 ib_in ' l4 600 ohm c29 1000pf * v3p3 c18 1000pf ib_in r106 3.4 + c2 10uf, 6.3v + c4 10uf, 6.3v * 1 2 3 j16 r104 750 1% l13 600 ohm
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 67 of 83 figure 4-2: 71m6531n12a2 demo board (rev 2.0): electrical schematic 2/3 ? ct configuration r34 nc tantalum v3p3 c10 1000pf r5 100 2w gnd v3p3 c37 0.1uf gnd c13 0.1uf 1 2 tp1 ia gnd c17 0.1uf v2p5 gnd ib r86 20.0k, 1% star connection at u5-50 c33 100pf 1 2 tp10 v1 r83 16.9k 1% vb gnd gnd y1 32.768khz vb_in 1 tp3 va rv2 varistor xout 1 2 d3 1n4736a c6 0.47uf, 1000vdc r118 100, 2w 6.8v 1w r6 100, 2w c32 0.03uf, 250vdc 1 2 jp1 ps_sel[0] rv1 varistor 1 j4 va_in live d4 1n4148 power supply selection table 1 2 3 j1 rapc712 gnd c5 0.1uf l9 nc * + c1 2200uf, 16v +5vdc ext supply * r9 68.1 r4 25.5k r7 130 r2 8.06k * = 1206 package 6 1 8 u2 tl431 v3p3 gnd avx ve24m00511k gnd l8 600 ohm ia_in ia gnd neutral r8 1.5 1 2 tp19 ia voltage connections xin c24 15pf c25 33pf tantalum r20 5k r89 0 tp15 tp vb selection o-board supply external dc supply (j1) ps_sel[0] (jp1) in out refa c11 1000pf 2 1 d8 3301d r18 698, 1% r16 274k, 1% r17 270k, 1% r15 2m, 1%, 1w c9 1000pf r33 750, 1% va l12 600 ohm 1 j9 neutral r22 698 1% r23 270k 1% r26 274k 1% r27 2m 1% 1w r33 750 1% + c22 10uf, 6.3v c12 1000pf c13 1000pf gnd 1 2 tp4 vb l3 600 ohm c14 1000pf ia_in ' r24 3.4 = 1206 package * * * only one shunt can be used at a time. r24 = 10kohm and r25 = nc when using current shunt for channel a. r24 = r25 = 3.4ohm when using ct for channel a. r14 750 1% c8 1000pf ia_in l7 600 ohm l6 600 ohm 1 2 3 j3 c16 1000pf r25 3.4 current connections c15 1000pf 1 j5 vb_in 1 2 tp2 va title size document number rev date: sheet of d6531n12a2 a2 71m6531 demo board schematic 68 pin package 4w, 2ph teridian semiconductor corp. custom 12 tuesday, december 18, 2007 l2 600 ohm neutral v2p5 50 gnda 52 v3p3a 53 va 54 vb 55 ib 56 ia 57 vref 58 v1 59 xin 62 xout 64 slug 69 u8a 6531-68qfn v3p3 gnd r88 nc gnd tantalum ia c21 1000pf l5 600 ohm r107 3.4 ib_in ' l4 600 ohm c29 1000pf * v3p3 c18 1000pf ib_in r106 3.4 + c2 10uf, 6.3v + c11 10uf, 6.3v * 1 2 3 j16 r104 750 1% l13 600 ohm 3.4 3.4 nc 600? 600?
71m6531 demo board user?s manual page: 68 of 83 ? 2007-2008 teridian semiconductor corporation v1.5 figure 4-3: 71m6531n12a2 demo board (rev 2.0): electrical schematic 3/3 ? digital section c19 0.1uf seg66/dio46 1 2 3 jp8 vbat gnd r80 100 ice_en gnd seg32/dio12 gnd c35 0.1uf seg15 seg49/dio29 r101 1k 1-2: no external battery 2-3: external bat. available to enable reset change r91 to 10k seg64/dio44 com2 vbat seg66/dio46 1 2 3 4 5 6 j15 r91 0 gnd v3p3d seg37/dio17 pclk c39 1000pf seg17 r109 10k 1 2 3 jp13 1 2 3 jp14 psdo r92 0 1 2 tp17 seg35/dio15 l10 600 ohm r95 10k seg16 seg34/dio14 seg64/dio44 c46 22pf seg37/dio17 c43 22pf com3 1 -,1f,1e,1d 2 3 3 -,2f,2e,2d 4 5 5 -,3f,3e,3d 6 7 7 -,4f,4e,4d 8 9 9 -,5f,5e,5d 10 11 11 -,6f,6e,6d 12 13 13 -,7f,7e,7d 14 15 15 -,8f,8e,8d 16 17 17 com2 18 com0 19 8a,8b,8c,8dp 20 21 21 7a,7b,7c,7dp 22 23 23 6a,6b,6c,6dp 24 25 25 5a,5b,5c,5dp 26 27 27 4a,4b,4c,4dp 28 29 29 3a,3b,3c,3dp 30 31 31 2a,2b,2c,2dp 32 33 33 1a,1b,1c,1dp 34 35 35 com1 36 u7 vim-828-dp vbat e_tclk c47 22pf psdi ypulse seg33/dio13 debug connector c48 22pf populate j14 or j15, not both. 2 4 6 8 10 1 3 5 7 9 j17 spi gnd v3p3 r84 10k rxtx c49 22pf r153 0 seg63/dio43 gnd amp 104068-1 lx5093 lx5093 seg13 c31 1000pf seg63/dio43 seg65/dio45 tclk v3p3d opt_tx_out v3p3d ice_en r110 1k seg65/dio45 c44 22pf gnd opt_rx c30 1000pf v3p3d seg14 com1 gnd r152 nc r151 0 rst_emul sw1 r150 0 r156 0 r154 1k 1 2 3 jp12 xpulse seg30/dio10 c45 nc ypulse com3 v3p3 title size document number rev date: sheet of d6531n12a2 a2 71m6531 demo board schematic 68 pin package 4w, 2ph teridian semiconductor corp. b 22 friday, december 14, 2007 seg08 com3 seg12 seg00 com1 com2 com0 com0 seg35/dio15 seg16 seg12 seg14 seg15 seg17 seg13 seg18 pcsz seg07 seg02 pclk psdo psdi seg01 seg08 seg33/dio13 seg00 gnd v3p3d v3p3d gnd gnd gnd tmuxout cktest uart_tx tmuxout_t cktest_t uart_tx_t uart_rx gnd v3p3 gnd opt_tx e_rxtx seg31/dio11 gnd gnd e_rst r10 62 r87 100 c3 1uf c7 22pf 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 j2 header 8x2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 j14 ice connector 1 2 3 jp4 ice enable r97 62 r79 100 r99 62 r98 62 ao 1 a1 2 a2 3 gnd 4 sda 5 scl 6 wp 7 vcc 8 u4 ser eeprom r155 nc c34 1000pf seg25/dio05 r108 10k r11 62 c26 1000pf r12 62 pcsz c28 0.1uf c20 0.1uf c23 0.1uf seg18 . v3p3 pulse outputs serial eeprom lcd emulator i/f varh seg49/dio29 xpulse gnd seg48/dio28 seg30/dio10 c40 100pf c42 100pf seg27/dio07 lcd seg02 1 2 tp22 gnd 1 2 tp21 r13 10k seg31/dio11 c36 1000pf c41 nc bat_mode seg34/dio14 seg01 gnd gnd seg48/dio28 1 2 3 4 5 j12 opt if c38 1000pf d5 r74 10k d6 r76 10k seg26/dio06 gndd 1 e_rxtx/seg9 2 opt_tx/dio2 3 tmuxout 4 tx 6 seg3/pclk 7 v3p3d 8 cktest/seg19 9 v3p3sys 10 seg4/psdo 11 seg5/pcsz 12 seg37/dio17 13 com0 14 com1 15 com2 16 com3 17 seg00 18 seg01 19 seg02 20 seg34/dio14 21 seg35/dio15 22 seg64/dio44 23 seg6/psdi 25 seg7/muxsync 26 seg08 27 seg65/dio45 28 seg63/dio43 29 seg33/dio13 30 seg12 31 seg13 32 seg14 33 seg15 34 seg16 35 seg17 36 seg18 37 ice_e 38 seg24/dio4 39 seg25/dio5 40 seg26/dio6 41 seg27/dio7 42 seg30/dio10 45 seg31/dio11 46 rx 48 reset 51 opt_rx/dio1 60 e_rst/seg11 66 e_tclk/seg10 67 pb 65 gndd 61 test 63 vbat 49 seg66/dio46 5 seg49/dio29 24 seg28/dio08 43 seg29/dio09 44 seg32/dio12 68 seg48/dio28 47 u8b 6531-68qfn gnd seg07 wh seg24/dio04 seg32/dio12 sw2
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 69 of 83 4.2 71m6531n12a2 demo board bill of material table 4-1: 71m6531n12a2 demo board: bill of material (shunt version) item q reference part pcb footprint digi-key/mouser part number part number manufacturer 1 1 c1 2200uf radial p5143-nd eca-1cm222 panasonic 2 3 c2,c4,c22 10uf rc1812 478-1672-1-nd tajb106k010r av x 3 1 c3 1uf rc0603 pcc2224ct-nd ecj-1vb1c105k panasonic 4 9 c5,c17,c19,c20,c23,c27,c28, 0.1uf rc0603 445-1314-1-nd c1608x7r1h104k tdk c35,c37 5 1c 6 0 . 4 7 u f bc1918-nd 2222 383 30474 bc components 6 7 c7,c43,c44,c46-c49 22pf rc0603 445-1273-1-nd c1608c0g1h220j tdk 715 c8-c14,c26,c29-c31, c34,c36,c38,c39 1000pf rc0603 445-1298-1-nd c1608x7r2a102k tdk 8 1 c24 15pf rc0603 9 1 c25 33pf rc0603 445-1275-1-nd c1608c0g1h330j tdk 10 2 c41,c45 nc rc0603 445-2171-1-nd c1608coh1h150j tdk 11 1 c32 0.03uf axial 75-125ls30-r 125ls30-r vishay 12 5 c18,c21,c33,c40,c42 100pf rc0603 445-1281-1-nd c1608c0g1h101j tdk 13 2 c15,c16 220pf rc0603 445-1285-1-nd c1608cog1h221j tdk 14 1 d3 6.8v zener d041 1n4736adict-nd 1n4736a-t diodes 15 1 d4 switching diode d035 1n4148dict-nd 1n4148-t diodes 16 2 d5,d6 led radial 404-1104-nd h-3000l stanley 17 1 d8 uclamp3301d sod-323 -- uclamp3301d.tct semtech 18 1 j1 dc connector sc237-nd rapc712x switchcraft 19 1 j2 header 8x2 8x2pin s2011e-36-nd pzc36daan sullins 20 2 j3,j16 header 3 3x1pin s1011e-36-nd pzc36saan sullins 21 3 j4,j5,j9 spade terminal a24747ct-nd 62395-1 amp 22 1 j12 header 5 5x1pin s1011e-36-nd pzc36saan sullins 23 1 j14 10x2 connector, 0.05" 571-5-104068-1 5-104068-1 amp 24 1 j15 header 6 6x1pin s1011e-36-nd pzc36saan sullins 25 1 j17 header 5x2 5x2pin s2011e-36-nd pzc36daan sullins 26 1 jp1 header 2 2x1pin s1011e-36-nd pzc36saan sullins 27 5 jp4,jp8,jp12,jp13,jp14 header 3 3x1pin s1011e-36-nd pzc36saan sullins 28 11 l2-l10,l12,l13 ferrite bead, 600 ohm rc0805 445-1556-1-nd mmz2012s601a tdk 29 2 rv1,rv2 varistor radial 594-2381-594-55116 238159455116 vishay 30 1 r2 8.06k, 1% rc0603 p8.06khct-nd erj-3ekf8061v panasonic 31 1 r4 25.5k, 1% rc0603 p25.5khct-nd erj-3ekf2552v panasonic 32 3 r5,r6,r118 100, 2w axial 100w-2-nd rsf200jb-100r yageo 33 1 r7 130, 1% rc1206 p130fct-nd erj-8enf1300v panasonic 34 1 r8 1.5 rc1206 p1.5ect-nd erj-8geyj1r5v panasonic 35 1 r9 68.1 rc1206 p68.1fct-nd erj-8enf68r1v panasonic 36 6 r10,r11,r12,r97,r98,r99 62 rc0603 p62gct-nd erj-3geyj620v panasonic 37 8 r13,r24,r74,r76, 10k rc0603 p10kgct-nd erj-3geyj103v panasonic r84,r95,r108,r109 38 4 r14,r32,r33,r104 750, 1% rc0603 p750hct-nd erj-3ekf7500v panasonic 39 2 r15,r27 2m, 1% axial 71-rn65df-2.0m rn65d2004fb14 dale 40 2 r16,r26 274k, 1% rc0805 p274kcct-nd erj-6enf2743v panasonic 41 2 r17,r23 270k, 1% rc0805 rhm270kcct-nd mcr10ezhf2703 rohm 42 2 r18,r22 698, 1% rc0805 p698cct-nd erj-6enf6980v panasonic 43 1 r20 4.99k, 1% rc0603 p4.99khct-nd erj-3ekf4991v panasonic 44 3 r79,r80,r87 100 rc0603 p100hct-nd erj-3ekf1000v panasonic 45 2 r106,r107 3.4, 1% rc1206 311-3.40frct-nd rc1206fr-073r40l yageo 46 4 r25,r34,r152,r155 nc rc0603 47 1 r83 16.9k, 1% rc0603 p16.9khct-nd erj-3ekf1692v panasonic 48 1 r86 20k, 1% rc0603 p20.0khct-nd erj-3ekf2002v panasonic 49 3 r101,r110,r154 1k rc0603 p1.0kgct-nd erj-3geyj102v panasonic 50 8 r88,r89,r91,r92,r150,r151, 0 rc0603 p0.0gct-nd erj-3gey0r00v panasonic r153,r156 51 2 sw1,sw2 p8051sct-nd evq-pjx05m panasonic 52 8 tp1,tp2,tp4,tp10,tp17,tp19, header 2 2x1pin s1011e-36-nd pzc36saan sullins 53 tp21,tp22 54 1 tp3 header 1 1x1pin s1011e-36-nd pzc36saan sullins 55 1 tp15 test point 5011k-nd 5011 keystone 56 1 u2 regulator, 1% so8 296-1288-1-nd tl431aidr texas instruments 57 1 u4 ser eeprom so8 at24c256bn-10su-1.8-nd at24c256bn-10su-1.8 atmel 58 1 u8 71m6531 68qfn -- 71m6531-im teridian 59 1 u7 vim-828-dp lcd vim-828 153-1110-nd vim-828-dp13.2-rc-s-lv varitronix 60 1 y1 32.768khz xc1195ct-nd e cs -. 32 7- 12 .5- 1 7x-tr e cs
71m6531 demo board user?s manual 4.3 71m6531n12a2 demo board pcb layout figure 4-4: 71m6531n12a2 demo board: top silk screen page: 70 of 83 ? 2007-2008 teridian semiconductor corporation v1.5
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 71 of 83 figure 4-5: 71m6531n12a2 demo board: top copper layer
71m6531 demo board user?s manual figure 4-6: 71m6531n12a2 demo board: bottom view with silk screen page: 72 of 83 ? 2007-2008 teridian semiconductor corporation v1.5
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 73 of 83 figure 4-7: 71m6531n12a2 demo board: bottom copper layer ? bottom view
71m6531 demo board user?s manual figure 4-8: 71m6531n12a2 demo board: bottom copper layer ? layer view from top page: 74 of 83 ? 2007-2008 teridian semiconductor corporation v1.5
71m6531 demo board user?s manual 4.4 debug board bill of material item quantity reference part pcb footprint digi-key part number part number manufacturer 1 21 c1-c3,c5-c10,c12-c23 0.1uf rc0805 445-1349-1-nd c2012x7r1h104k tdk 2 1 c4 33uf, 10v rc1812 478-1687-1-nd tajb336k010r avx 3 1 c11 10uf, 16v rc1812 478-1673-1-nd tajb106k016r avx 4 2 d2,d3 led rc0805 160-1414-1-nd ltst-c170kgkt liteon 5 4 g1,g2,g3,g4 spacer mthole 2202k-nd 2202k-nd keystone electronics 6 4 4-40, 1/4" screw h342-nd pms 4400 - 0025 ph building fasteners 7 1 j1 dc connector rapc712x sc237-nd rapc712x switchcraft 8 1 j2 db9, right angle, female dsub9_skt a32117-nd 5747844-4 amp/tyco 9 1 j3 header (f) 8x2 8x2pin s7111-nd pppc082lfbn-rc sullins 10 4 jp1,jp2,jp3,jp4 header 2 2x1pin s1011e-36-nd pzc36saan sullins 11 4 r1,r5,r7,r8 10k rc0805 p10kact-nd erj-6geyj103v panasonic 12 2 r2,r3 1k rc0805 p1.0kact-nd erj-6geyj102v panasonic 13 1 r4 nc rc0805 n/a n/a n/a 14 1 r6 0 rc0805 p0.0act-nd erj-6gey0r00v panasonic 15 1 sw2 pb switch p8051sct-nd evq-pjx05m panasonic 16 5 u1,u2,u3,u5,u6 isolator soic8 adum1100arz-nd adum1100arz adi 17 2 tp5,tp6 test point -- 5011k-nd 5011 keystone electronics 18 1 u4 rs232 driver 28ssop max3237cai+-nd max3237cai+ maxim table 4-2: debug board: bill of material v1.5 ? 2007-2008 teridian semiconductor corporation page: 75 of 83
71m6531 demo board user?s manual page: 76 of 83 ? 2007-2008 teridian semiconductor corporation v1.5 4.5 debug board schematics figure 4-9: debug board: electrical schematic + c11 10uf, 16v (b case) c15 0.1uf c13 0.1uf vdd1 1 din 2 vdd1 3 gnd1 4 gnd2 5 dout 6 gnd2 7 vdd2 8 u5 adum1100 vdd1 1 din 2 vdd1 3 gnd1 4 gnd2 5 dout 6 gnd2 7 vdd2 8 u6 adum1100 c19 0.1uf gnd_dbg c23 0.1uf gnd_dbg gnd c21 0.1uf v5_dbg gnd v3p3 c14 0.1uf c18 0.1uf c17 0.1uf c2 0.1uf gnd_dbg c1 0.1uf v3p3 gnd dio02 v5_dbg gnd_dbg c3 0.1uf v5_dbg gnd_dbg dio01 vdd1 1 din 2 vdd1 3 gnd1 4 gnd2 5 dout 6 gnd2 7 vdd2 8 u2 adum1100 dio00 gnd_dbg gnd c8 0.1uf gnd_dbg gnd_dbg v5_dbg dio01_dbg c5 0.1uf v3p3 c6 0.1uf r2 1k d2 led gnd_dbg dio01 v5_dbg gnd gnd 232vp1 rxpc 232vn1 232c1p1 232c1m1 232c2m1 r1 10k gnd_dbg gnd r3 1k c10 0.1uf v5_dbg gnd_dbg gnd dio00 vdd1 1 din 2 vdd1 3 gnd1 4 gnd2 5 dout 6 gnd2 7 vdd2 8 u3 adum1100 v3p3 c9 0.1uf v3p3 c12 0.1uf gnd gnd_dbg v5_dbg d3 led dio00_dbg gnd_dbg v5_dbg c22 0.1uf 1 2 jp4 hdr2x1 gnd_dbg vdd1 1 din 2 vdd1 3 gnd1 4 gnd2 5 dout 6 gnd2 7 vdd2 8 u1 adum1100 v5_dbg gnd_dbg gnd_dbg gnd_dbg gnd gnd gnd uart_tx v3p3 v3p3 gnd uart_rx_t sw2 display sel c20 0.1uf gnd v5_dbg gnd_dbg 1 2 3 j1 rapc712 c16 0.1uf v3p3 gnd v5_dbg v5_dbg gnd_dbg gnd gnd tp6 tp tp5 tp r7 10k r5 10k r4 nc 1 6 2 7 3 8 4 9 5 j2 db9_rs232 r8 10k 5vdc ext supply debug connector status leds rs232 transceiver r6 0 uart_rx tx232 normal 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 j3 header 8x2 dio00 gnd gnd gnd dio02 v5_dbg gnd_dbg gnd cktest v3p3 dio01 uart_rx_t uart_tx tmuxout v5_dbg gnd_dbg 232c2p1 normal null null rx232 v5_dbg gnd_dbg gnd_dbg txpc txiso rxiso + c4 33uf, 10v c7 0.1uf 1 2 jp3 hdr2x1 1 2 jp1 hdr2x1 1 2 jp2 hdr2x1 c1+ 28 c1- 25 c2+ 1 c2- 3 t1in 24 t2in 23 t3in 22 t4in 19 t5in 17 r1outbf 16 r1out 21 r2out 20 r3out 18 gnd 2 mbaud 15 shdnb 14 enb 13 r3in 11 r2in 9 r1in 8 t1out 5 t2out 6 t3out 7 t4out 10 t5out 12 v- 4 v+ 27 vcc 26 u4 max3237cai
71m6531 demo board user?s manual 4.6 debug board pcb layout figure 4-10: debug board: top view figure 4-11: debug board: bottom view v1.5 ? 2007-2008 teridian semiconductor corporation page: 77 of 83
71m6531 demo board user?s manual figure 4-12: debug board: top signal layer figure 4-13: debug board: middle layer 1, ground plane page: 78 of 83 ? 2007-2008 teridian semiconductor corporation v1.5
71m6531 demo board user?s manual figure 4-14: debug board: middle layer 2, supply plane figure 4-15: debug boar d: bottom trace layer v1.5 ? 2007-2008 teridian semiconductor corporation page: 79 of 83
71m6531 demo board user?s manual page: 80 of 83 ? 2007-2008 teridian semiconductor corporation v1.5 4.7 teridian 71m6531d/f pin-out information power/ground/nc pins : name type circuit description gnda p -- analog ground: this pin should be connected directly to the ground plane. gndd p -- digital ground: this pin should be connected directly to the ground plane. v3p3a p -- analog power supply: a 3.3v power supply s hould be connected to this pin, must be the same voltage as v3p3sys. v3p3sys p -- system 3.3v supply. this pin should be connected to a 3.3v power supply. v3p3d o 13 auxiliary voltage output of the chip, controll ed by the internal 3.3v selection switch. in mission mode, this pin is internally connected to v3p3sys. in brownout mode, it is internally connected to vbat. this pin is floating in lcd and sleep mode. limit the capacitance to gnd of this pin to 0.1f. vbat p 12 power supply for battery backup and oscillator circuit. a battery or super-capacitor is to be connected between vbat and gndd. if no battery is used, connect vbat to v3p3sys. v2p5 o 10 output of the internal 2.5v regulator . a 0.1f capacitor to gnda should be connected to this pin. analog pins: name type circuit description ia, ib i 6 line current sense inputs: these pins are voltage inputs to the internal a/d converter. typically, they are connect ed to the outputs of current sensors. unused pins must be tied to v3p3a. va, vb i 6 line voltage sense inputs: these pins are voltage inputs to the internal a/d converter. typically, they are connect ed to the outputs of resistor dividers. unused pins must be tied to v3p3a. if unused, vb can also be tied to va. v1 i 7 comparator input: this pin is a voltage input to the internal comparator. the voltage applied to the pin is compared to the internal bias voltage (1.6v). if the input voltage is above vbias, the comparator output will be high (1). if the comparator output is low, a voltage fault will occur. a series 10k resistor should be connected from v1 to the resistor divider. vref o 9 voltage reference for the adc. this pin should be left unconnected. xin xout i 8 crystal inputs: a 32khz crystal should be connected across these pins. typically, a 33pf capacitor is also connected from xin to gnda and a 7pf capacitor is connected from xout to gnda. it is important to minimize the capacitance between these pins. see the crystal manufacturer datasheet for details. pin types: p = power, o = output, i = input, i/o = input/o table 4-3: 71m6531d/f pin description 1/2
71m6531 demo board user?s manual v1.5 ? 2007-2008 teridian semiconductor corporation page: 81 of 83 digital pins: name type circuit description com3, com2, com1, com0 o 5 lcd common outputs: these 4 pins prov ide the select signals for the lcd display. seg0?seg2, seg7, seg8, seg12?seg18 o 5 dedicated lcd segment output pins. com3, com2, com1, com0 o 5 lcd common outputs: these 4 pins prov ide the select signals for the lcd display. seg0?seg2, seg7, seg8, seg12?seg18 o 5 dedicated lcd segment output pins. seg24/dio4? seg35/dio15 i/o 3, 4, 5 multi-use pins, conf igurable as either lcd seg driver or dio. (dio4 = sck, dio5 = sda when configured as eeprom interface, wpulse = dio6, varpulse = dio7 when configured as pulse outputs). unused pins must be configured as outputs or terminated to v3p3/gndd. seg37/dio17 i/o 3, 4, 5 multi-use pins, config urable as either lcd seg driver or dio. unused pins must be configured as outputs or terminated to v3p3/gndd. seg48/dio28, seg49/dio29 seg63/dio43? seg66/dio46 seg3/pclk seg4/psdo seg5/pcsz seg6/psdi i/o 3, 4, 5 multi-use pins, configurable as either lcd seg driver or spi port. e_rxtx/seg9 i/o 1, 4, 5 multi-use pins, configurable as either emulator port pins (when ice_e pulled high) or lcd seg drivers (w hen ice_e tied to gnd). e_rst/seg11 i/o 1, 4, 5 e_tclk/seg10 o 4, 5 ice_e i 2 ice enable. when zero, e_rst, e_tclk, and e_rxtx become seg32, seg33, and seg38 respectively. for produ ction units, this pin should be pulled to gnd to disable the emulator port. cktest/seg19 o 4, 5 multi-use pin, configurable as eit her clock pll output or lcd segment driver. can be enabled and disabled by ckout_en . tmuxout o 4 digital output test multiplexer. controlled by dmux[3:0]. opt_rx/dio1 i/o 3, 4, 7 multi-use pin, configurable as either optical receive input or general dio. when configured as opt_rx, this pin receives a signal from an external photo-detector used in an ir serial interface. if this pin is unused it must be configured as an output or terminated to v3p3d or gndd. opt_tx/dio2 i/o 3, 4 multi-use pin, configurab le as either optical led transmit output, wpulse, rpulse, or general dio. w hen configured as opt_tx , this pin is capable of directly driving an led for transmitting data in an ir serial interface. reset i 2 chip reset: this input pin is used to re set the chip into a known state. for normal operation, this pin is pulled low. to reset the chip, this pin should be pulled high. this pin has an internal 30 a (nominal) current source pull- down. no external reset circuitry is necessary. rx i 3 uart input. if this pin is unused it must be configured as an output or terminated to v3p3d or gndd.
71m6531 demo board user?s manual tx o 4 uart output. test i 7 enables production test. this pin must be grounded in normal operation. pb i 3 push button input. this pin must be at gndd when not active. a rising edge sets the ie_pb flag. it also causes the part to wake up if it is in sleep or lcd mode. pb does not have an internal pull-up or pull-down. table 4-4: 71m6531d/f pin description 2/2 pinout (qfn 68) page: 82 of 83 ? 2007-2008 teridian semiconductor corporation v1.5 figure 4-16: teridian 71m6531d/f lqfp64: pinout (top view)
71m6531 demo board user?s manual 4.8 revision history revision date description 1.0 04-13-2007 initial release 1.1 08-28-2007 updated referenced to lcd and lcd display options. updated tables 1-12 through 1-14. 1.2 10-30-2007 added description of macro files for adaptation of demo code to shunt/ct configurations. updated list of mp u addresses. added chapter for rtc calibration and compensation. 1.3 12-18-2007 updated schematics, bom and pcb layout images to demo board revision 2.0. 1.4 01-28-2008 added description of new ypulse functionality and list of ce locations for demo code revision 4p6. corrected description of ]u command, added description of cls command. updated ki t contents (shunt resistor for shunt configuration only). added safety notes for emulator operation in section 1.9.5 and to section 1.11. 1.5 06-02-2008 updated references to latest demo code revision. deleted application circuit diagrams (shown in data sheet) and ce address tables. updated pin-out diagram (top-view). user manual: this user manual contains proprieta ry product definition information of teridian semiconductor corporation (tsc) and is made available for informati onal purposes only. teridian assumes no obligation regarding future manufacture, unless agreed to in writing. if and when manufactured and sold, this product is sold subject to the terms and conditions of sale supplied at the time of ord er acknowledgment, including those pertaining to warranty, patent infringement and limitation of li ability. teridian semiconductor corporation (tsc) reserves the right to make changes in specifications at any time wi thout notice. accordingly, the reader is cautioned to verify that a data sheet is current before placi ng orders. tsc assumes no liability for applications assistance. teridian semiconductor corp., 6440 oak canyon rd., suite 100, irvine, ca 92618-5201 tel (714) 508-8800, fax (714) 508-8877, http://www.teridian.com v1.5 ? 2007-2008 teridian semiconductor corporation page: 83 of 83

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